Abstract: A parallel-pipeline video signal processing system is disclosed which includes a statistical decoder, an arithmetic and logic unit and a pixel interpolator which operate in parallel under the control of sequencing circuitry to expand a compressed video signal. The video signal may have been developed using a variety of compression techniques including Huffman-type statistical encoding.

Abstract: A processor for expanding a compressed video signal includes a pixel interpolator which interpolates between input pixel values in two dimensions. This interpolator calculates and stores intermediate pixel values which are interpolated in the vertical direction. A pair of these intermediate pixel values are then fed back into the interpolator which performs a horizontal interpolation to produce pixel values that are interpolated in both the horizontal and vertical dimensions. In steady state operation, the horizontal and vertical interpolation operations are alternated to produce a stream of two-dimensionally interpolated values.

Abstract: A display processor for a computer with graphics capability includes color map memories addressed by portions of pixel codes during display line trace intervals. The read-outs from these color map memories provide the primary color component signals from which the drive signals for the display monitor kinescope are derived. The pixel codes, from which color map memory addresses are derived, are supplied at video rate to the display processor from the serial output port of dual-ported video random access memory. The color map memories are loaded with new color map data during display retrace intervals. By supplying this new color map data from the serial port of the dual-ported video random-access memory, the color map memories can be rapidly updated.

Abstract: A system for generating a series of psuedo random numbers so that numbers in the sequence may be randomly accessed. The system includes apparatus for scrambling the bits of a plurality of seed numbers. The pattern of bit scrambling is governed by the control number. The plurality of scrambled seed numbers are exclusive-OR'ed to produce an output number. As long as the seed numbers remain unchanged, a given control number will always produce the same psuedo random number.

Abstract: A full motion color digital video signal is compressed, formatted for transmission, recorded on compact disc media and decoded at conventional video frame rates. During compression, regions of a frame are individually analyzed to select optimum fill coding methods specific to each region. Region decoding time estimates are made to optimize compression thresholds. Region descriptive codes conveying the size and locations of the regions are grouped together in a first segment of a data stream. Region fill codes conveying pixel amplitude indications for the regions are grouped together according to fill code type and placed in other segments of the data stream. The data stream segments are individually variable length coded according to their respective statistical distributions and formatted to form data frames.

Abstract: A simplified-in-structure vertical interpolator for compressed video data down-loaded from image memory to an odd-line line storage memory and an even-line line storage memory is followed in cascade by a horizontal interpolator. The horizontal interpolator calculates the difference between adjoining pixels in horizontally compressed video data from the vertical interpolator, divides the difference by the horizontal compression ratio and accumulates the divided differences during line trace intervals to recover de-compressed video data.

Abstract: Computer main memory is used for storing relatively densely sampled luminance detail information concerning a television display and for storing relatively sparsely sampled narrowband color-component information concerning the same television display. The relatively densely sampled luminance detail information is read out in substantially real-time from computer main memory during line trace intervals in the television display. The relatively sparsely sampled narrowband color-component information is read out of computer main memory in advanced and compressed time during selected line retrace intervals in the television display.

Abstract: The invention is embodied in a system comprising image memory and a display processor that automatically processes video data which alternate between having chrominance pixels of greater area than luminance pixels and having chrominance pixels of the same area as luminance pixels. Subsamples describing chrominance pixels of greater size are time-division-multiplexed with samples describing pixels in the image memory output when the former type of processing is done. Whichever format for video data is currently being used, the channel for reading subsamples from image memory to the display processor is used to transmit flag data controlling the mode of processing of video data performed by the video processor.

Abstract: Computer main memory is used for storing relatively densely sampled luminance information concerning a television display and for storing relatively sparsely sampled chrominance information concerning the same television display. The relatively densely sampled luminance information is read out in substantially real-time from computer main memory during line trace intervals in the television display. The relatively sparsely sampled chrominance information is read out of computer main memory in advanced and compressed time during selected line retrace intervals in the television display.