Abstract: A brake control unit for providing a brake output signal to a brake load includes a processor, an accelerometer and a memory subsystem. The accelerometer is coupled to the processor and provides a brake control signal to the processor, which is configured to provide the brake output signal to the brake load in response to the brake control signal. The memory subsystem is coupled to the processor and stores processor executable code, which causes the processor to automatically set at least one of a gain level and a boost level for the brake control unit.