Abstract: A voltage mode drive for a servo system builds a drive matrix from an error signal, which is the difference between a measured value for a parameter of the servo system, such as the position of a rotating drum, and a reference signal, a voltage control signal for the servo system, and an estimated set of parameters for the servo system, the parameters including drive current. The outputs from the drive matrix are a new estimated set of parameters for the servo system which are multiplied by appropriate system constants to produce the voltage control signal. The voltage control signal is amplified by a voltage amplifier and applied to drive the servo system.

Abstract: A trigger system for a digital oscilloscope operating in external clock mode. Every n pulses, the trigger system generates a trigger signal. The trigger system therefore provides a trigger every n samples of the input signal waveform.

Abstract: To increase the percentage of time that an input signal is actively monitored, a digital oscilloscope has an acquisition system (100) that includes an analog-to-digital converter (15), an acquisition memory (40), an acquisition rasterizer (50), and a raster acquisition memory (60). The rasterizer contains circuitry (52) for concurrently rasterizing and combining the results of several acquisitions together and with a stored composite raster image to produce a new composite raster image, while additional acquisition records are being created and stored in the acquisition memory. A display system (200) takes the composite raster images after they contain the results of many acquisitions and overlays these single-bit raster images on a multi-bit raster image that is then decremented to produce a simulated persistence effect.

Abstract: A liquid crystal cell (60) for an optical display system has a first transparent electrode structure (62) including plural separate display electrodes (72A-72E) spaced apart from and generally parallel to a second electrode structure (64) including a common electrode (106) opposing the display electrodes across a thin layer (76) of liquid crystal material captured between the two electrode structures. Each display electrode has left (92A-92E) and right (94A-94E) ends having respective electrical contact areas (96A-96E, 98A-98E). The left and right ends of each display electrode are electrically driven with a drive signal (V.sub.DRIVE (A-E)). The common electrode has top (116) and bottom (118) ends located adjacent respective top (108) and bottom (110) side margins of the second electrode structure and having top center (120) and bottom center (122) locations with respective top and bottom electrical contact areas (124, 126).

Abstract: An optical time domain reflectometer acquires and displays waveform data as a waveform trace on a display device having a viewport defined by a start distance and an end distance using waveform data segments having data points where each waveform segment is acquired using different pulsewidth and sample spacing and different starting distance. A processor sets a horizontal pixel skip value and a horizontal distance skip value for each waveform segment and calculates a horizontal distance per pixel value for the display area as a function of dividing the distance between the viewport start distance and the viewport end distance by the number of horizontal pixels in the display area.

Abstract: A modular instrumentation system with a chassis having a number of module slots and having a plenum providing airflow to the slots. A ventilator connected to the chassis blows air into the plenum. A number of dampers are connected to the chassis, each adjacent a respective module slot and movable between a closed position blocking airflow between the plenum and the module slot, and an open position permitting airflow between the plenum and the module slot. Each damper is biased to the closed position and automatically moves to the open position in response to installation of a module in the module slot.

Abstract: An addressing structure uses an ionizable gaseous mixture having a decreased decay time to address data storage elements (16) defined by the overlapping areas of multiple column electrodes (18) on a first substrate (48) and multiple channels (20) on a second substrate (54). Each of the channels contains the ionizable gaseous mixture and includes a reference potential electrode that receives a data signal and a row electrode that receives a data strobe signal. The ionizable gaseous mixture contains an ionizable gaseous medium and ionized particles that are collisionally matched with the ionizable gaseous medium to produce an decreased decay time of the ionizable gaseous mixture. The decreased decay time of the ionizable gaseous mixture provides an addressing structure having high-speed addressing capabilities.

Abstract: A logic analyzer acquires all data and clock signal inputs asynchronously at high speed using a digital FISO (10) to produce a plurality of parallel high-speed data samples within each cycle of an internal system clock (95). The plurality of parallel high-speed data samples describe the sequential behavior of one of the input signals during one period of the internal system clock. One of the plurality of parallel high-speed data samples is then selected to be the single data sample that is stored in the acquisition memory (80) for that clock cycle. The selection process includes a skew adjustment (20), clock edge detection and selection (50), aligning the sample associated with the detected and selected clock edge to a reference location (60), and selecting (70) as the single sample to be stored a sample having a relationship to the reference location that is determined by setup and hold adjustment data.

Abstract: A high-speed data acquisition and processing system. The system includes a sequential sampler that samples an input signal at periodic intervals. The resulting samples are provided on a plurality of sample outputs. These sample outputs are received by a matrix of signal processors, each of which receives and processes at least two inputs, and provides a processor output. The first row of signal processors receives the sample outputs and processes them. Subsequent rows of signal processors receive and process the outputs of signal processors in previous rows.

Abstract: Composite video timing adjustments using digital resampling provides precise sub-pixel timing relative to a timing reference with a single video master clock. A digital resampler interpolates an input digital composite video signal as a function of a phase offset input which defines a fractional clock period of the video master clock derived from the timing reference. The sub-pixel offset digital composite video signal also may be adjusted by integer multiples of the video master clock period using a FIFO memory. The final timing adjusted digital composite video signal then is input to an analog reconstruction circuit to provide an output analog composite video signal that is precisely timed to the timing reference.

Abstract: A high speed analog signal sampling system. The system comprises a timing chain having a plurality of delay elements arranged in series and a sample rate multiplier having a delay lock control system responsive to the outputs of first, second and third parallel delay elements in the sample rate multiplier to control the delay of the second parallel delay element so that its strobe signal output occurs one-half the time between the strobe signal outputs of the first parallel delay element and the third parallel delay element. The first, second and third parallel delay elements are the first three parallel delay elements of the timing chain, and a control signal of the delay lock control system is used to adjust and control the amount of delay introduced by every other parallel delay element after the second parallel delay element.

Abstract: A signal source provides an output signal which can sweep over a broad frequency range in a well-controlled manner. The signal source includes a voltage controlled oscillator (VCO) producing the output signal and a waveform synthesizer producing a reference signal. The VCO output signal is phase locked to the reference signal. To make the VCO signal continuously sweep over a broad frequency range, the reference signal sweeps repeatedly over a narrow frequency range. During each sweep of the reference signal, the VCO frequency tracks an integer harmonic of the reference signal frequency. The frequency and phase of the reference signal for each successive sweep are abruptly reset at the beginning of each sweep selected such that the VCO signal frequency locks to another integer harmonic of the reference signal frequency and does not change.

Abstract: A composite signal-limit indicator for a component monitor converts an input video signal, such a digital 422 signal or a GBR signal, into composite Y and Mag C component signals The composite Y and Mag C component signals are presented on an X-Y display together with graticules that represent the locus of 100 IRE values and of -20 IRE values. Points of the composite Y and Mag C component signals that fall outside the arrowhead formed by the graticules indicate composite signal level violations for the input video signal. The composite Y and Mag C component signals are combined and compared with the limits represented by the graticules. The results of the comparison are latched for further processing to automatically provide the composite signal-limit indicator. The results of the comparison may also be used to generate a bright-up display on an image monitor that flickers to indicate the locations within the image represented by the input video signal where the composite signal level violations occur.

Abstract: An accumulator-based phase locked loop reduces phase noise by shifting the energy of the phase noise to higher frequencies. A second accumulator is inserted between a first accumulator and a pulse generator to integrate a phase error from the first accumulator referenced to a clock signal. The output of the pulse generator is an approximation frequency signal that is compared with a comparable frequency signal derived from a reference signal to produce an error signal to control the frequency of the clock signal.

Abstract: A split-path isolation amplifier (10) employs a transformer (30) in a high path (26) and a single-input, dual-output closed-loop optocoupler (66) in a low path (24) to achieve a flat, wide frequency response without need for frequency compensation adjustments. In a low path frequency region (106), the optocoupler provides all or most of the signal to the output. The isolation amplifier employs a substantially overlapped crossover frequency region (104) in which the high path signal is applied to a primary winding (28) of the transformer, and the low path signal is applied differentially to secondary windings (40, 42) of the transformer. At frequencies below the crossover frequency range, the signal from the optocoupler dominates as the signal coupled from the primary winding rolls off. At frequencies above the crossover frequency range, the signal coupled from the primary winding dominates as the signal from the optocoupler rolls off.

Abstract: A digital oscilloscope of the type that processes (30) the digital waveform values of the waveform record using interpolation and/or decimation (81) to produce a main trace record (91) and first (92) and second (93) zoomed trace records, and uses those records to produce (40) a main trace display (65) and first (61) and second (62) zoomed trace displays is improved by providing (94) a first zoom box (63) encompassing that portion of the main trace (65) display shown in the first zoomed trace (61) display and a second zoom box (64) encompassing that portion of the main trace (65) display shown in the second zoomed trace (62) display.

Abstract: A chrominance transition corrector for restoring chrominance transitions after they have been degraded by a limited bandwidth channel converts input luminance and chrominance components, which represent a video image, from the time to the frequency domain. Correction coefficients are determined from a low frequency portion of the converted luminance component and the converted chrominance components. Corrected high frequency portions of the chrominance components are generated from the correction coefficients and a high frequency portion of the converted luminance component. The resulting converted and corrected high frequency portion of the chrominance components are then converted back to the time domain to produce chrominance output components, the chrominance transitions having been corrected.

Abstract: A system and method for printing a predetermined image onto a substrate includes steps or structure for determining a first area on the substrate where a colorant is to be deposited; determining a second area which is immediately adjacent to the first area; depositing an image-enhancing precoat over the first area and the second area; and depositing a colorant on the exposed surface of the image-enhancing precoat substantially so as to be over the first area, whereby a border of precoat material will be defined about the printed image on the substrate. A second aspect of the disclosure involves sealing a printed image on a substrate by applying an aftercoat.