Abstract: A power on reset circuit continuously asserts a reset output signal to a reset logic state (e.g., RESET) during the recovery of a power supply voltage from an inoperative voltage level, e.g., zero volts, to an operative minimum voltage level. The reset circuit continues to assert the reset output to the reset Logic State for an additional, active reset interval after the power supply voltage is above the minimum operative level. At the end of the additional active reset interval, the reset output is released to an operational logic level (e.g, NOT-RESET or RESET\). Operative logic circuits receiving the reset output signal are thus provided with the active reset interval in which to perform their built-in reset functions after the power supply level is at or above the minimum operative level. At the expiration of the active reset interval, the power on reset circuit provides the subsequent operative circuits with the NON-RESET logic state to indicate normal operation can be resumed.

Abstract: An optical memory 200 including an optical storage element 301 for storing data as a packet of photons, optical storage element 301 delaying in time the packet of photons traveling through the storage element from a first point to a second point. A photon source 302 receives an electrical signal representing data and injects the packet on to optical storage element 301 in response, and a detector 303 selectively detects the packet traveling on optical storage element 301. A feedback path 306/305 couples photon source 302 and detector 303 for recirculating the packet through storage element 301.

Abstract: An apparatus for monitoring a thermal state of a system includes a thermal management integrated circuit (IC). The thermal management IC is coupled to receive a remote temperature signal. The remote temperature signal is indicative of a system temperature. The thermal management IC includes a software programmable temperature threshold setpoint, and a hardware programmable temperature critical threshold setpoint.

Abstract: In the preferred embodiment, the outputs of a plurality of analog signal generators are connected to a single wire (the analog bus). Each analog signal generator is addressable by a unique code provided to its respective address input terminals. A host controller selectively addresses only one of the analog signal generators such that an output of only one of the analog signal generators is applied to the analog bus at a time. In this manner, a single wire may be used to transmit a plurality of analog signals to a receiver. In one embodiment, the receiver is a MUX having an output connected to an ADC.

Abstract: An apparatus for sensing the rotation of a brushless DC fan includes the fan and a sense/driver circuit and a capacitance. The sense/driver circuit is coupled to the fan to receive a sense input signal including a fluctuating electrical effect caused by fan commutation events. The sense/driver circuit processes the sense input signal to generate a sense output signal indicative of fan operation. The sense/driver circuit includes an integrated circuit. The integrated circuit includes a sense input pin, a ground return pin, a driver circuit, an integrated filter portion, a filter pin and a level detecting circuit. The capacitance is coupled to the filter pin to provide a filter with the integrated filter portion. The driver circuit includes a control terminal, a first current handling terminal coupled to the sense input pin and a second current handling terminal coupled to provide a ground return pat.

Abstract: Disclosed herein is a monolithic fan controller circuit which provides the following features: a special start-up routine for the fan; a fan fault detector; a thermal fault detector; an automatic speed controller; a minimum speed controller; a routine for attempting to clear temporary fan faults; and a controllable drive signal frequency. A start-up control circuit provides an initial high duty-cycle kick to the fan in order to initiate the rotation of the fan. A temperature sensor, which may be external or internal to the monolithic fan controller, supplies a signal which is proportional to measured temperature. This signal is used to control the output pulse width of a pulse-width modulator (PWM) or control the frequency of a pulse frequency modulator (PFM). The PWM or PFM output signal regulates the speed of the brushless (or brush) DC fan motor. In a preferred embodiment, the monolithic fan controller has 8 pins.

Abstract: A method for controlling the operation of a brushless DC fan for cooling heat generating components of a system is provided. The method includes providing a system temperature signal indicative of a system temperature and providing an intelligent shutdown enable signal. The system temperature signal is compared with a shutdown temperature signal if the intelligent shutdown enable signal has a first value. The shutdown temperature signal is representative of a shutdown temperature value. The fan is operated at a generally temperature proportional speed after comparing the system temperature signal with the shutdown temperature signal if the system temperature as indicated by the system temperature signal is greater than the shutdown temperature value as indicated by the shutdown temperature signal.

Abstract: A programmable low dropout regulator includes an operational amplifier which is used both to provide a bandgap voltage and to drive an output load. In one embodiment implemented in an integrated circuit, external resistors are provided by the user to achieve a user-selected regulated voltage. In that embodiment, an input pin allows the user to select also internal resistors which provide a predetermined regulated voltage.

Abstract: A voltage detector is described herein which eliminates an entire operational amplifier or comparator from conventional voltage detectors. In one embodiment of such a voltage detector, a band gap reference generator is connected so as not to incorporate any feedback mechanism and where an off balance in the band gap reference generator is used to detect whether an input voltage falls below a threshold voltage. By eliminating the feedback path in the band gap reference generator, a comparator is eliminated. Other types of voltage detectors which provide a highly stable operation over a wide range of temperatures are described.

Abstract: An integrated circuit voltage converter containing a capacitive charge pump performing DC to DC conversion is disclosed which detects, either automatically or by an external signal, the onset of a low power consumption situation and switches to a low power consumption mode. In one embodiment, the low power consumption mode is accomplished by reducing the operating frequency of the charge pump. In another embodiment, the switching transistors used to switch the capacitors in the charge pump during a low power consumption mode are smaller than those transistors used to switch the capacitors during its normal operating mode. In another embodiment, the DC to DC converter switches back and forth between a high frequency (burst) mode and a low frequency (low power) mode at intervals. In another embodiment, a combination of the power reduction techniques is used. Various techniques for detecting when a low power consumption mode is appropriate are also described.

Abstract: A short-circuit protection circuit senses the output current of an output transistor to provide a control signal to a control transistor. The control transistor, in response to the control signal, varies an input voltage to an internal stage of an amplifier driving the output transistor, so as to cause the output transistor is switched off. A hysteresis resistor is coupled in series with an input terminal of the short circuit protection circuit, so as to prevent transient noise from switching off said output transistor.

Abstract: An integrated circuit providing two output functions from a single output controlled by an input with a single switch responsive to an input level.

Abstract: A charge pump circuit including two transfer capacitors, two reservoir capacitors and a plurality of switches. The transfer capacitors are charged to Vin when the charge pump circuit is in a first operating state, the transfer capacitors are connected in a first series arrangement to apply a +2 Vin charge to one of the reservoir capacitors when the charge pump circuit is in a second operating state, and the transfer capacitors are connected in a second series arrangement to apply a -2 Vin charge to the other of the reservoir capacitors when the charge pump circuit is in a third operating state. A control circuit is provided to control the plurality of switches such that the charge pump circuit enters the first through third operating states is a predetermined sequence.

Abstract: A fixed and a user adjustable voltage reference is alternatively provided by an integrated switch which switches between two current sources according to an input voltage. A fixed reference voltage is achieved by amplifying the current of one of the two current sources according to a predetermined voltage difference between the output terminal and an internal reference voltage. An adjustable reference voltage is achieved by amplifying the current of other of the two current sources according to a voltage difference between the internal reference voltage and an user adjustable voltage. In one embodiment, the user adjustable voltage is achieved by a user adjustable voltage divider circuit.

Abstract: A capacitance measuring device incorporates the integrating analog-digital converter circuit of a handheld meter. The capacitance measuring device charges an unknown capacitance with a constant current until the voltage across the unknown capacitor reaches a predetermined voltage. At the same time, a reference voltage is applied to the input lead of an integrating circuit of the integrating analog-digital converter such that a corresponding proportional charge is stored in the feedback capacitor of the integrating circuit. The negative of the reference voltage is then applied to the integrating circuit so that charge is removed from the feedback capacitor at the same rate as the feedback capacitor was charged. A counter is used to determine the number of clock pulses it took to completely discharge the feedback capacitor and hence a reading of the unknown capacitance can be determined from the equation C.sub.X =I.sub.CHARGE *T.sub.2 /V.sub.TRIP.

Abstract: An integrating circuit includes first and second amplifiers for use during a zero-integrate mode and a X10 mode, respectively. The first amplifier is a low gain amplifier to ensure stability, whereas the second amplifier is a high gain amplifier to improve accuracy. During the zero-integrate mode, switches couple an integrator input lead to the first amplifier output lead and decouple it from the second amplifier output lead. During the X10 mode, the switches decouple the integrator input lead from the first amplifier output lead and couple it to the second amplifier output lead.

Abstract: A buffer circuit having both high gain and high slew rate is implemented using a high gain-low slew rate amplifier and a switch network. The buffer circuit's operation is divided into three periods. During the first period, the output of the amplifier is isolated from the load to allow the amplifier's output voltage to more quickly reaches its final voltage level. During the second period, the switch network couples the amplifier output lead to the load input lead where the amplifier drives the voltage at the load's input lead to a voltage substantially equal to the voltage of the input signal. During the third period, the switch network isolates the amplifier from the load and couples the load's input lead to a source of ground potential to quickly slew the load's input lead to ground potential.

Abstract: A battery charger including a battery detector at a node at which a battery is connectable. When a battery is not present, a voltage at the node fluctuates, but when a battery is present, the battery holds the voltage substantially constant. A level shifter shifts the voltage at the node. If no battery is present, the shifted voltage will fall below a predetermined threshold, but if a battery is present, the shifted voltage will remain above the predetermined threshold. A ground sense comparator detects whether or not the shifted voltage is below the predetermined threshold, and provides a battery detection signal accordingly. A controllable charge driver couples power from a power supply through to a battery, to charge the battery. An integrated circuit provides logic functions of the apparatus, including logic functioning as a charge controller.