Abstract: Process and device for the compression of image data by a mathematical transformation implemented at low cost, particularly for the transmission at reduced speed of sequences of images.The objective is to provide an economical method in "silicon area - processing speed" cost to implement a mathematical transformation of the DCT type, on arrays of pixels, suitable for image compression.According to the invention, the method consists essentially of combining a permutation (1) of each block of pixels with a series of one dimensional FFT (211, 213). A series of variants is obtained by adding or not adding steps of matrix calculation (22) of reconstitution of a complex 2D-FET, of rotations (3) of reconstitution of the DCT, and/or of suppression of the imaginary coefficients.

Abstract: A method for the estimation of the motion of electronic picture points, in the plane of the picture, by means of fast, convergent and adaptive processing, notably in order to enable subsequent, efficient processing, by sub-sampling, of the picture sequence without harming the psycho-visual quality of the picture reconstructed from the sub-sampled picture. To each electronic picture point, there is assigned a displacement vector, computed according to a WALKER and RAO type of algorithmic process of prediction/correction, the predicted value of motion of the current point being the value of the original displacement vector associated with a point of origin of the preceding picture, so that said current point is the approximate projection of said point of origin along said original displacement vector.

Abstract: A method and a device are provided for giving an indication on the safety margin offered by a digital video signal circulating on a parallel digital video interface in parallel with a clock signal. For that purpose, the process includes: (a) decoding the data signals with the clock signal in unaltered form; (b) decoding the data signals with the clock signal after a predetermined time shift has been introduced between them; (c) comparing data words obtained from the decoding steps (a) and (b); and (d) repeating steps (a)-(c) with a plurality of successive shifts and determining the minimum amount of shift which results in significant differences between the data words decoded with and without time shift.

Abstract: A method for encoding data for assistance in the reconstruction of sub-sampled moving electronic images, particularly HDTV images transmitted by MAC channel, optimizing the representation of the assistance data while minimizing the corresponding throughput of data through compression of the image signal by segmentation of the image into homogeneous blocks of different sizes. An imbricated, hierarchical encoding is achieved on the image blocks, for assigning to the blocks a choice of processing, on the one hand, and a motion vector, on the other hand.

Abstract: A method provides greater reduction in the throughput rate and, at the same time, greater fidelity to the configuration of an HD source image. The method is applied to a multiprocessing system wherein, within the picture or picture image blocks, "neutral" processing mode picture elements are determined, namely picture elements capable of accepting, without discrimination, at least two distinct sub-sampling processing modes; and it is chosen to associate, with each of the neutral processing mode picture elements, the one of the neutral processing modes that enables an optimal reduction in the throughput rate of the assistance data.

Abstract: According to the invention, the control messages are constituted by a general addressing message (GCM), followed by shared addressing messages (SACM). The message (GCM) contains all the information common to all the user groups and a confirmation data item of the group of users and the messages (SACM) a shared address. Thus, the group is defined in a manner inherent in the control messages and can undergo reconfiguration at any time.Application to more particularly satellite broadcasting of television programmes.

Abstract: The useful signal of a sampled video line is, at least partially, spliced to two adjacent segments (AB, BC), each of which has at least two states. The splicing point (B) between the two segments is synchronously defined in a pseudo-random manner at transmission and reception. Upon transmission, at each line and in a pseudo-random manner, one of two possible scrambling schemes is selected. The first scheme involves local reversing of the second segment, and the second scheme involves a reversing of the second segment followed by a permutation with the first segment. Upon reception, the processing is the inverse of the processing which occurred at transmission and is applied in order to reintroduce intelligibility to the video signal. That is the locally reversed segments are received and reversed, following the permutation used at transmission. The process applies to a MAC signal.

Abstract: For broadcasting an HDTV picture over a transmission channel having a frequency band narrower than that necessary for direct transmission of the HD TV picture, the HDTV source picture is sub-sampled at an analysis image frequency f.sub.o for distributing the spatial data of each HDTV image of the source picture over n successive frames, n being greater than 1. The resulting samples are subjected to temporal energy attenuating filtering in a frequency range around fO/n to obtain a modified signal, which is sent over the transmission channel. Upon reception, the modified signal is subjected to temporal filtering for enhancing energy in the frequency range before subjecting it to decoding for restoring the HDTV picture.

Abstract: The device and method disclosed relate to the field of electronic devices and methods enabling the transposition of any even-order square matrix, the elements of which are given in sequence. The goal is to provide for the transposition of sequences of data representing elementary image blocks, without any duplication of the memory space needed to store an elementary block, in optimizing the two parameters of operating speed and space occupied on silicon. This goal is achieved by a buffer memory divided into two identical storage half-planes, working together with a device for the sequencing of the reading/writing operations, providing simultaneously for a reading operation on one of the storage half-planes and a writing operation on the other half-plane.

Abstract: An antenna array with circular symmetry made up of an array of cylindrica shaped printed circuit elementary antennas. It is made up of small radiating sources which are placed in superposed circles on a cylindrical surface. The sources are distributed at constant angular intervals on the circles. They have little coupling between themselves. On each circle of sources, they are energized in phase and with the same amplitude. An angular phase shift can be provided between the group of sources on a circle and those of another circle. The antenna can be energized by a three-layer printed circuit line. It can be made up by an array of doublets folded into sheets. Inside the cylinder the transmitter is installed to which is applied a signal to be transmitted and which supplies the modulated carrier to the array of radiating sources.

Abstract: A digital broadcasting process, suitable for digital audiobroadcast, comprises encoding the data in the form of binary words using a redundant code to obtain a sequence of modulation symbols and transmitting the symbols in a plurality of subchannels at different frequencies. The symbols are time interlaced with such a distribution that two adjacent symbols cannot be transmitted in time succession and at the same one of the frequencies. Preferably, a Viterbi decoder is used. Particular construction of an emitter and a receiver are also described.

Abstract: The system comprises input modules (Pei) receiving entering packets, output modules (PSi) transmitting outgoing packets, a control memory (M) with double access and divided into routing modules (PTi, PAj), and a resource control module (GR).It also comprises an input time-division bus (BHDE) to connect timewise input modules (PEi) to routing modules (PTI, PAj) selected in the central memory (M) and an output time-division bus (BHDS) to connect timewise routing modules (PTi, PAj) of the central memory (M) to output modules (PSi). The control module (GR) is bidirectionally connected to the input modules (PEi) and to the central memory (MO through the input time-division bus (BHDE), on one hand, and to the output modules (PSi) and the central memory (M) by the output time-division bus (BHDS), on the other hand.

Abstract: The storage cells are grouped into elements grouping at least two cells, each element being locatable by an address and having a parity. The balance of the card is the number of non-zero even elements with an address below the address of the odd element with the lowest address and which is called the "terminal". In order to debit the card and reduce said balance, the terminal is moved towards a lower address, while creating a new old element of lower address than the terminal to be displaced. In order to credit the card and increase this balance, the terminal is moved towards a higher address, while again giving to possible odd elements with a higher address than the terminal to be displaced an even character and while creating a new odd element with a higher address than the terminal to be displaced.

Abstract: A resonant loop current disturbing probe. This probe comprises a conductive loop closed on a photoresistor, a light-emitting diode optically coupled to the photoresistor by an optical fiber and a diode control circuit. This probe is characterized in that it also comprises a variable capacitor connected in parallel to the loop. The loop-capacitor assembly forms a resonant circuit, the capacitor being adjusted in such a way that said circuit resonates at the frequency of the current to be disturbed. Application is to the measurement of the current in antennas.

Abstract: A mixer device designed for a TV production control room mixes incoming video signals of PAL, NTSC or MAC standard. To avoid any differences in video signal propagation time through a known video grid, the latter is suppressed, and a grid with narrower band width switches chopping signals selectively controlling attenuations of the incoming video signals in analog multipliers. The chopping signals are derived in operator circuits as a function of effect and dissolve signals designed to chop image planes to be superposed into a resultant image. In particular, amplitude complementarity of the chopping signals between two predetermined levels is ensured, whatever the dissolves and effects selected, and a proportion of a black image signal, transmitted normally during line and field blankings, is mixed during a black fade or a darkening to be created in the resultant image.

Abstract: A random access memory (RAM) comprises memory cells each including an RS type flip-flop having complementary data inputs and transistors for forcing the flip-flop by that one of two data wires which is at a given level (high level for example) when a selection wire is at a first given level (high level for example). The flip-flop is connected to an output wire by circuitry for maintaining the output wire at the high level as long as the selection wire is at the first level and for causing the output wire to take the level corresponding to the condition of the flip-flop when the selection wire is brought to the other level. The transistors are preferably N-MOS for higher speed.

Abstract: One chip microprocessor, which is more particularly designed to execute culation algorithms of a public code encoding system formed by a public function and a secret inverse function of the type comprising at least one programmable read-only memory, a processing unit and an input/output device, wherein it comprises a memory, in which is recorded at least one algorithm corresponding to the performance of said secret function, and wherein the programmable read-only memory contains the secret parameters constituting the secret code and recorded in an area of the read-only memory which is inaccesible from the outside, the processing unit including the multiplying circuits necessary for the execution of the algorithm.

Abstract: A demodulator including a Hilbert transformer (20), a carrier regenerating circuit (30), a first delay line (35), a second delay line (36), a first switching device (38), a second switching device (39), a first multiplier (40), a second multiplier (42), a second adder (44), a third switching device (46), a third multiplier (48), a fourth switching device (50), a fourth multiplier (52), a second adder (54) and a divider circuit (60). This demodulator is able to demodulate either a frequency modulated signal, or a signal with double amplitude modulation in quadrature and with suppressed carrier.

Abstract: A process and apparatus for connecting the color coding of one equipment to another equipment. The position of the color of character Cc of the first equipment in the interval Ci-Ci+1 of two successive colors of the second equipment and the position of the background color Cf in the interval Cj-Cj+1 are determined. As a function of these positions, the character color is taken either as Ci, or as Ci+1. The background color is taken either as Cj or Cj+1.

Abstract: A process for the base band modulation of a data signal on a magnetic support is characterized in that: (a) a bit value of 0 is marked if it follows an unmarked bit of value of 0 or a sequence of three consecutive unmarked bits of value 1; (b) a bit value 1 as marked if it follows a bit value 0 or a sequence of three consecutive unmarked bits of value 1, except if these rules (a) and (b) lead to marking the first bit of a sequence formed from three bits of value 1 followed by a bit of value 0. The minimum interfront in the modulated signal is equal to 1.5 T and the maximum interfront is equal to 4 T.