Abstract: A method of making a tiled array of semiconductor dies includes aligning and flattening. One end of each semiconductor die has attached thereto a respective printed circuit board. The aligning aligns the semiconductor dies into the tiled array in such a way that the semiconductor dies rest on a vacuum plate and the one end of each die extends beyond an edge of the vacuum plate. The flattening flattens the semiconductor dies against the vacuum plate with a vacuum after the semiconductor dies are aligned.
Type:
Grant
Filed:
April 17, 2012
Date of Patent:
April 21, 2015
Assignee:
Teledyne Rad-icon Imaging Corp.
Inventors:
Farrier Michael George, Roumbanis John Bernard