Abstract: Boot-up delay within a television receiver IC is substantially reduced by loading a portion of an operating program into the television receiver IC to enable execution of time-consuming receiver initialization operations, and then executing the receiver initialization operations concurrently with loading the remainder of the operating program into the television receiver IC. By this operation, the time required to execute the receiver initialization operations may be at least partly hidden under the time required to load the operating program, thereby substantially reducing the boot-up delay.

Abstract: Embodiments of the present invention provide a solution for integrating a headset antenna and whip antenna together as a combined antenna for a mobile TV application. In certain embodiments, the invention can be applied to portable devices for both analog TV, FM radio, and digital TV applications and can be applied more generally to any wireless system which spans a broad frequency range, where the antenna gain of two antennas together can exceed the performance of either alone. In a preferred embodiment, the present invention provides a connector module that is configured to connect to both a whip antenna and a headset antenna while providing necessary electrical and signal isolation. The isolation can be accomplished by using a plurality of filters. There are other embodiments as well.

Abstract: The present invention is directed to mobile devices. More specifically, embodiments of the present invention provide one or more antennas embedded into headsets and/or earphone for mobile devices. In an embodiment, an antenna wire having a length of about 100 mm to 150 mm is implement as a part of a headset or an earphone that has an overall length of at least 90 cm, where the antenna wire is substantially insulated from the audio wire(s). The headset or earphone is connected to a mobile device that receives television signals from the antenna. In a specific embodiment, a mobile device includes a connection circuit that is configured to separate television signals form audio signals. In an exemplary embodiment, various components of the mobile device positioned at predetermine location away from the connection circuit to reduce noise and/or interference.

Abstract: A method and circuitry for processing a video signal corresponding to a source synchronous video broadcast which corresponds to a selected channel which is one of a plurality of channels of a broadcast spectrum. In one aspect, the method includes generating digitized data of the video signal, which corresponds to the source synchronous video broadcast, using a local clock signal having a frequency which is different from the frequency of the source clock of the video broadcast; generating video data using the digitized data of the video signal; generating formatted video data blocks by arranging the video data into one or more lines or frames of video data; generating temporal reference signals wherein each temporal reference signal is associated with at least one formatted video data block.

Abstract: Video processing circuitry to adaptively process input video data which corresponds to a plurality of video frames of a selected channel which is one of a plurality of channels of a broadcast spectrum. In one aspect, the video processing circuitry includes spatial adaptation circuitry to generate and output spatially adapted video data corresponding to the plurality of video frames, temporal adaptation circuitry to generate and output temporally adapted video data corresponding to the plurality of video frames, and video manipulation circuitry, coupled to the spatial adaptation circuitry and the temporal adaptation circuitry, to generate output video data corresponding to the plurality of video frames, using the input video data, the spatially adapted video data and the temporally adapted video data. Methods of adaptively processing input video data which corresponds to a plurality of video frames of a selected channel which is one of a plurality of channels of a broadcast spectrum are also disclosed.

Abstract: A sequence of data packets is received within an integrated circuit device and stored within a first memory thereof Error descriptor values are updated within a second memory of the integrated circuit device based on error information associated with the sequence of data packets. The error descriptor values each include an address field to specify a corresponding storage region of the first memory and an error field to specify an error status of data values stored within the storage region. A sequence of multiple-bit error values are generated based, at least in part, on the error fields and address fields within respective subsets of the error descriptor values. Concurrently with generation of at least one of the multiple-bit error values the state of one or more bits of the data values stored in the first memory based are changed based on a previously-generated one of the multiple-bit error values.

Abstract: A method and circuitry for decoding an encoded video data stream which corresponds to a selected channel which is one of a plurality of channels of a broadcast spectrum.

Abstract: A sequence of data packets is received within an integrated circuit device and stored within a first memory thereof. Error descriptor values are updated within a second memory of the integrated circuit device based on error information associated with the sequence of data packets. The error descriptor values each include an address field to specify a corresponding storage region of the first memory and an error field to specify an error status of data values stored within the storage region. A sequence of multiple-bit error values are generated based, at least in part, on the error fields and address fields within respective subsets of the error descriptor values. Concurrently with generation of at least one of the multiple-bit error values the state of one or more bits of the data values stored in the first memory based are changed based on a previously-generated one of the multiple-bit error values.

Abstract: Embodiments of the present invention provide a solution for integrating a headset antenna and whip antenna together as a combined antenna for a mobile TV application. In certain embodiments, the invention can be applied to portable devices for both analog TV, FM radio, and digital TV applications and can be applied more generally to any wireless system which spans a broad frequency range, where the antenna gain of two antennas together can exceed the performance of either alone. In a preferred embodiment, the present invention provides a connector module that is configured to connect to both a whip antenna and a headset antenna while providing necessary electrical and signal isolation. The isolation can be accomplished by using a plurality of filters. There are other embodiments as well.

Abstract: The present invention is directed to mobile devices. More specifically, embodiments of the present invention provide one or more antennas embedded into headsets and/or earphone for mobile devices. In an embodiment, an antenna wire having a length of about 100 mm to 150 mm is implement as a part of a headset or an earphone that has an overall length of at least 90 cm, where the antenna wire is substantially insulated from the audio wire(s). The headset or earphone is connected to a mobile device that receives television signals from the antenna. In a specific embodiment, a mobile device includes a connection circuit that is configured to separate television signals form audio signals. In an exemplary embodiment, various components of the mobile device positioned at predetermine location away from the connection circuit to reduce noise and/or interference.

Abstract: An analog video receiver implemented in an integrated circuit device. The analog video receiver includes an amplifier to amplify an analog video signal having a desired carrier frequency, and a mixing circuit to mix the amplified analog video signal with a complex sinusoid having a frequency substantially equal to the carrier frequency.

Abstract: An analog video receiver implemented in an integrated circuit device. The analog video receiver includes a mixing circuit to mix an analog video signal with a sinusoid to generate a frequency-shifted analog video signal, and an offset cancellation circuit to obtain a sample of the frequency-shifted analog video signal during a first time interval and, based on the sample, generate an offset cancellation signal that, when summed with the frequency-shifted analog video signal, reduces a substantially time-invariant offset in the frequency-shifted analog video signal.

Abstract: A self-calibrating analog-to-digital converter (ADC). The ADC includes multiple component ADCs to generate respective digital representations of an input signal in response to respective timing signals that are offset in phase from one another, each component ADC having a gain setting that controls a magnitude of the digital representations. The ADC further includes correction circuitry to generate a plurality of fast-Fourier transforms (FFTs) that correspond to the digital representations of the input signal and to adjust the gain settings of the component ADCs and/or phase angles of the timing signals based on gain and phase errors indicated by the FFTs.

Abstract: An analog video receiver implemented in an integrated circuit device. The analog video receiver includes an amplifier to amplify an analog video signal having a desired carrier frequency, and a mixing circuit to mix the amplified analog video signal with a complex sinusoid having a frequency substantially equal to the carrier frequency.

Abstract: An integrated circuit device having a television signal tuner, video decoder and power control circuit. The television signal tuner selects one of a plurality of television channels, and the video decoder converts a television signal conveyed in the selected television channel into a video display signal. The power control circuit alternately enables and disables the television tuner to enable reception of a first portion of video information conveyed in the television signal and to disable reception of a second portion of the video information.

Abstract: In a signal communication device, a frequency-selective filter has at least one component that is biased by a control signal to establish a center frequency of the frequency-selective filter. A closed-loop bias generator is provided to generate the control signal and to adjust the control signal based, at least in part, on a comparison of the control signal and a reference signal.

Abstract: A self-calibrating analog-to-digital converter (ADC). The ADC includes multiple component ADCs to generate respective digital representations of an input signal in response to respective timing signals that are offset in phase from one another, each component ADC having a gain setting that controls a magnitude of the digital representations. The ADC further includes correction circuitry to generate a plurality of fast-Fourier transforms (FFTs) that correspond to the digital representations of the input signal and to adjust the gain settings of the component ADCs and/or phase angles of the timing signals based on gain and phase errors indicated by the FFTs.

Abstract: A first data packet is received within an integrated circuit device and stored within a first memory thereof starting at a first address that is determined by the size of one or more previously received data packets. An error descriptor value is updated within a second memory of the integrated circuit device, the error descriptor including an error field that indicates an error that is associated with the first data packet, an address field that indicates the first address within the first memory and a length field that indicates a range of storage locations to which the error applies. A multiple-bit error value is generated based, at least in part, on the error descriptor, each bit of the multiple-bit error value corresponding to a respective storage location within a storage row of the first memory. The state of one or more bits within the storage row of the first memory are changed based, at least in part, on the multiple-bit error value.

Abstract: An analog video receiver implemented in an integrated circuit device. The analog video receiver includes first and second mixing circuits to generate a complex baseband signal by mixing a carrier-frequency analog video signal with respective sinusoids of a quadrature sinusoid pair; and a filtering circuit to subtract a scaled complex conjugate of the complex baseband signal from the complex baseband signal.

Abstract: Phase noise mitigation in an analog video receiver implemented in an integrated circuit device. A phase correction value that indicates a phase offset between a synthesized sinusoid and a reference sinusoid conveyed in a horizontal retrace region of a composite video signal is periodically generated. A phase error that will accumulate during an interval between horizontal retrace regions of the composite video signal is estimated based, at least in part, on the phase correction value, and the phase of a chroma signal component of the composite video signal is adjusted based on the estimated phase error.