Abstract: A system of circuit board chassis can be configured to accept different types of circuit boards or modules. In one embodiment, a first chassis is adapted to receive a first type of circuit board, and a second chassis is adapted to fit inside the first chassis in place of at least one of the circuit boards. In this embodiment, the second chassis is also adapted to receive circuit boards of a second type, enabling them to operate inside the first chassis. As a result, a system that may have been previously adapted to receive only one type of circuit board may be configured to operate with multiple types of circuit boards.

Abstract: A packet scheduler includes a packet manager interface, a policer, a congestion manager, a scheduler, and a virtual output queue (VOQ) handler. The policer assigns a priority to each packet. Depending on congestion levels, the congestion manager determines whether to send a packet based on the packet's priority assigned by the policer. The scheduler schedules packets in accordance with configured rates for virtual connections and group shapers. A scheduled packet is queued at a virtual output queue (VOQ) by the VOQ handler. In one embodiment, the VOQ handler sends signals to a packet manager (through the packet manager interface) to instruct the packet manager to transmit packets in a scheduled order.

Abstract: Service providers can reduce multiple overlay networks by creating multiple logical service networks (LSNs) on the same physical or optical fiber network. The LSNs are established by the service provider and can be characterized by traffic type, bandwidth, delay, hop count, guaranteed information rates and/or restoration priorities. Once established, the LSNs allow the service provider to deliver a variety of services to customers depending on customer's traffic specifications. Different traffic specifications are serviced on different LSNs, depending on each LSN's characteristics. Such LSNs, once built within a broadband network, can be customized and sold to multiple customers.

Abstract: An exemplary method for writing packets in a data stream comprises the steps of dividing a packet into long packet cells and short packet cells, storing the long packet cells in a set of long cell queues and the short packet cells in a set of short cell queues, selectively pairing a long packet cell in one of the set of long cell queues with a short packet cell in one of the set of short cell queues to obtain an optimized pair of packet cells at each write cycle, and sequentially writing the optimized pair of packet cells at each write cycle to a set of memory banks.