Abstract: A method and apparatus for acoustic noise cancellation (“ANC”) in an audio headset. A combination of an analog feedforward path and at least one digital feedforward path enables the ANC facility to operate with the shorter delay inherent in analog electronics, but with the capability of better cancellation of reflections that digital feedforward allows.

Abstract: A ternary pulse width modulation (“PWM”) method and apparatus. In one embodiment, the start of the pulse sequence in the “current” frame is referenced to the end of the pulse sequence in a previous, “reference” frame, rather than to the frame boundary at the start of the current frame, thereby allowing the compensation portion of the pulse sequence to overlap into the preceding or following frame, thus achieving a higher modulation index without dropping the compensation pulses. Although in most instantiations, the reference frame will be the frame immediately preceding in time the current frame, in other instances, the reference frame may be any frame preceding the current frame that falls within the constraints of the timing facility.

Abstract: A pipelined decimation in frequency FFT butterfly method, and an apparatus to perform this method comprising: a data memory with at least one read port and one write port; an add/subtract unit receiving data from the memory; a multiply/accumulate unit receiving data from the add/subtract unit; a source of coefficients, from logic gates or a coefficient memory, to supply FFT twiddle factors to the multiply/accumulate unit; a shifter receiving data from at least one of the add/subtract unit and the multiply/accumulate unit, the shifter supplying data to the write port of the data memory; wherein the apparatus performs these calculations in four cycles of the add/subtract unit and in four cycles of the multiply/accumulate unit, using complex arithmetic.

Abstract: An audio processing integrated circuit chip, such as codec chip, includes at least one port output circuit configured to generate an audio signal to drive an external audio device and a PC beep circuit configured to receive a PC beep signal and to apply the received PC beep signal to an input of the at least one port output circuit. The chip further includes a control circuit configured to detect activity of the PC beep signal and to enable and/or disable the at least one port output circuit responsive to the detected activity.

Abstract: A ternary pulse width modulation (“PWM”) method and apparatus. In one embodiment, the start of the pulse sequence in the “current” frame is referenced to the end of the pulse sequence in a previous, “reference” frame, rather than to the frame boundary at the start of the current frame, thereby allowing the compensation portion of the pulse sequence to overlap into the preceding or following frame, thus achieving a higher modulation index without dropping the compensation pulses. Although in most instantiations, the reference frame will be the frame immediately preceding in time the current frame, in other instances, the reference frame may be any frame preceding the current frame that falls within the constraints of the timing facility.

Abstract: A pipelined decimation in frequency FFT butterfly method, and an apparatus to perform this method comprising: a data memory with at least one read port and one write port; an add/subtract unit receiving data from the memory; a multiply/accumulate unit receiving data from the add/subtract unit; a source of coefficients, from logic gates or a coefficient memory, to supply FFT twiddle factors to the multiply/accumulate unit; a shifter receiving data from at least one of the add/subtract unit and the multiply/accumulate unit, the shifter supplying data to the write port of the data memory; wherein the apparatus performs these calculations in four cycles of the add/subtract unit and in four cycles of the multiply/accumulate unit, using complex arithmetic.

Abstract: A sample rate converter for an oversampled data stream develops interpolated samples at a first oversample rate, from samples at a second oversample rate; wherein the first oversample rate is a non-integer multiple of the second oversample rate. When the samples at the second oversample rate are changing state, at least two interpolated samples are generated or the interpolation is at least second order. When the sample at the second oversample rate is not changing state, the sample at the second oversample rate is passed substantially unchanged. In one embodiment of the invention, asynchronous sample rate conversion is performed, and the first oversample rate is a varying non-integer multiple of the second oversample rate.

Abstract: A method and apparatus for generating harmonics using polynomial non-linear functions. Polynomial functions are used to produce harmonics of an input signal up to a predetermined order, and that match a preferred set of characteristics. The preferred characteristics include approximating a sine function to generate odd harmonics, and using a function with zero slope at ?1, 0, and +1 to generate even harmonics. The polynomial coefficients may be chosen such that most of the coefficients for the odd polynomial function are scaled by the same constant as the coefficients for the even polynomial function, so that the calculation is shared between the two polynomials. In one embodiment, a digital signal processor having a pipelined ALU and a MAC is used to calculate the desired polynomial non-linear functions.

Abstract: An audio playback loop circuit including an audio amplifier for amplifying an analog audio signal based on digitally controlled power supplies, and a digitally controlled power supply selection circuit for generating and selecting the digitally controlled power supplies based on a digital signal.