Patents Assigned to Teralogic, Inc.
  • Patent number: 6563511
    Abstract: The present invention is a method and apparatus to generate an anti-flickered pixel from a source pixel having a source pixel value in a display memory. The apparatus comprises a plurality of storage elements, a filter, a comparator, and an output selector. The plurality of storage elements store a sequence of pixels in the display memory which includes the source pixel. The filter is coupled to the plurality of storage elements to filter the sequence of pixels. The filter generates a filtered pixel corresponding to the source pixel. The comparator is coupled to the plurality of storage elements to compare the source pixel value with a threshold value. The comparator generates a comparison result. The output selector is coupled to the filter and the storage elements to select one of the source and filtered pixels according to the comparison result. The selected one of the source and filtered pixels is the anti-flickered pixel.
    Type: Grant
    Filed: March 5, 1999
    Date of Patent: May 13, 2003
    Assignee: Teralogic, Inc.
    Inventors: Gerard K. Yeh, Anoush Khazeni
  • Patent number: 6556193
    Abstract: The present invention is a method and apparatus for de-interlacing image data in a memory. A read interface circuit is coupled to the memory to transfer a patch of the image data from the memory to a buffer. A de-interlacing circuit is coupled to the read interface circuit to de-interlace the image data in the patch from the buffer. A receive circuit is coupled to the de-interlacing circuit to re-organize the de-interlaced image data.
    Type: Grant
    Filed: April 2, 1999
    Date of Patent: April 29, 2003
    Assignee: Teralogic, Inc.
    Inventors: David Auld, Gerard K. Yeh, Peter Trajmar
  • Patent number: 6526583
    Abstract: According to one embodiment, a graphics/video processor includes a memory controller. The memory controller includes a first arbiter that receives memory client requests to access a memory device, and a first memory buffer coupled to the first arbiter. The first arbiter stores client requests that are selected by the first arbiter. The memory controller also includes a second arbiter coupled to the first memory buffer and a second memory buffer coupled to the second arbiter. The second arbiter receives requests from the memory client requests stored in the first memory buffer. The second memory buffer stores the client requests selected by the second arbiter. Further, the memory controller includes a third arbiter coupled to the second memory buffer. The third arbiter provides access of the memory device to the client requests stored in the second memory buffer.
    Type: Grant
    Filed: March 5, 1999
    Date of Patent: February 25, 2003
    Assignee: Teralogic, Inc.
    Inventors: David R. Auld, Bruce K. Holmer, Hong-Jyeh Jason Huang, Gerard K. Yeh
  • Patent number: 6493036
    Abstract: A video processing apparatus comprising: a selection unit which selects a portion of a first image for magnification; and a magnification unit which magnifies a portion of a second image corresponding to the portion of the first image, the second image being a higher resolution image than the first image.
    Type: Grant
    Filed: November 17, 1999
    Date of Patent: December 10, 2002
    Assignee: Teralogic, Inc.
    Inventor: Gustavo A. Fernandez
  • Patent number: 6466220
    Abstract: A method and apparatus for display of graphical data is described. The invention provides an architecture for graphics processing. The architecture includes pipelined processing and support for multi-regional graphics. In one embodiment, a graphics driver according to the invention can receive multiple independent streams of graphical data that can be in different graphical formats. The independent streams are synchronized and converted to a common format prior to being processed. In one embodiment, multi-regional graphics are supported with off-screen and on-screen memory regions for processing. The regions of the multi-regional graphic are rendered in an off-screen memory. The data in the off-screen memory are converted to a common format and copied to on-screen memory. The data in the on-screen memory is used to generate an output image. Alpha blending can also be programmed to provide multi-regional graphics or other graphical features.
    Type: Grant
    Filed: March 5, 1999
    Date of Patent: October 15, 2002
    Assignee: Teralogic, Inc.
    Inventors: Joseph F. Cesana, Peter Trajmar, Edward Wang, Hank Guo, Steve Chiou, Bruce K. Holmer, David Auld
  • Patent number: 6411334
    Abstract: The present invention is a method and apparatus for correcting aspect ratio of a display by scaling a source array of pixel data in a memory by a scale factor to a destination array of pixel data. The apparatus comprises a coefficient unit, a register unit, and an arithmetic unit. The coefficient unit is coupled to a buffer to load N coefficients. The register unit is coupled to the source array to load N pixel data synchronously with the coefficient unit. The N pixel data are started at a location in the source array according to the scale factor. The arithmetic unit is coupled to the coefficient unit and the register unit to perform a filtering operation on the loaded N pixel data using the corresponding N coefficients. The arithmetic unit generates a filtered output corresponding to a scaled pixel in the destination array.
    Type: Grant
    Filed: March 5, 1999
    Date of Patent: June 25, 2002
    Assignee: Teralogic, Inc.
    Inventors: Gerard K. Yeh, Anoush Khazeni, David Auld, Bruce K. Holmer, Meng-Day Yu
  • Patent number: 6411333
    Abstract: The invention is a method and apparatus for processing image data stored in a memory. A read interface circuit is coupled to the memory to transfer a patch of the image data from the memory to a buffer. A scale filter is coupled to the read interface circuit to scale the image data in the patch from the buffer. A receive circuit is coupled to the scale filter to re-organize the scaled image data.
    Type: Grant
    Filed: April 2, 1999
    Date of Patent: June 25, 2002
    Assignee: Teralogic, Inc.
    Inventors: David Auld, Gerard K. Yeh, Peter Trajmar, C. Dardy Chang, Kevin P. Acken
  • Patent number: 6353459
    Abstract: The invention provides a method and apparatus for conversion of video data from a source format to a second destination. Conversion can be performed in real time and intermediate data is stored in a buffer. Converted video data is written into the buffer at a first rate and read out of the buffer at a second rate. In order to avoid overflow and underflow conditions, a threshold value is determined based, at least in part, on the video format being converted. The threshold value indicates a point in frame conversion at which converted data is read out of the buffer.
    Type: Grant
    Filed: March 31, 1999
    Date of Patent: March 5, 2002
    Assignee: Teralogic, Inc.
    Inventors: Gerard K. Yeh, Hsiang O-Yang, David Auld
  • Patent number: 6327000
    Abstract: The present invention is a method and apparatus for converting scan rates of image data in a memory. A buffer stores a source image data. A scaling filter is coupled to the buffer to scale the source image data.
    Type: Grant
    Filed: April 2, 1999
    Date of Patent: December 4, 2001
    Assignee: Teralogic, Inc.
    Inventors: David Auld, Gerard K. Yeh, Peter Trajmar, C. Dardy Chang, Meng-Day Yu
  • Publication number: 20010036323
    Abstract: A wavelet transform system and an inverse wavelet transform system are disclosed that respectively implement a wavelet transform and an inverse wavelet transform. Semi-orthogonal standard wavelets are used as the basic wavelets in the wavelet transform and the inverse wavelet transform. As a result, two finite sequences of decomposition coefficients are used for decomposition in the wavelet transform. Furthermore, two finite sequences of reconstruction coefficients that are derived from the two finite sequences of decomposition coefficients are used for reconstruction in the inverse wavelet transform. The finite sequences of decomposition and reconstruction coefficients are not infinite sequences of coefficients that have been truncated. Furthermore, in one embodiment, downsampling is not used in the wavelet transform and upsampling is not used in the inverse wavelet transform.
    Type: Application
    Filed: June 11, 2001
    Publication date: November 1, 2001
    Applicant: Teralogic, Inc.
    Inventor: Charles K. Chui
  • Patent number: 6275619
    Abstract: A wavelet transform system and an inverse wavelet transform system are disclosed that respectively implement a wavelet transform and an inverse wavelet transform. Semi-orthogonal standard wavelets are used as the basic wavelets in the wavelet transform and the inverse wavelet transform. As a result, two finite sequences of decomposition coefficients are used for decomposition in the wavelet transform. Furthermore, two finite sequences of reconstruction coefficients that are derived from the two finite sequences of decomposition coefficients are used for reconstruction in the inverse wavelet transform. The finite sequences of decomposition and reconstruction coefficients are not infinite sequences of coefficients that have been truncated. Furthermore, in one embodiment, downsampling is not used in the wavelet transform and upsampling is not used in the inverse wavelet transform.
    Type: Grant
    Filed: June 15, 2000
    Date of Patent: August 14, 2001
    Assignee: Teralogic, Inc.
    Inventor: Charles K. Chui
  • Patent number: 6031940
    Abstract: A video data encoding system and method represents video frame image by an initial array of data. The image data array is processed by a wavelet transform function to produce an array of transform coefficients, sometimes called a processed image data array. The processed image data array is divided into subarrays and each subarray is encoded by generating a plurality of encoded representations of the subarray, and then selecting and outputting the smallest of the encoded subarray representations. The plurality of encoded representations are generated by encoding the subarray using a predefined coding technique; generating a differential array that is equal to the difference, on a coefficient by coefficient basis, between the subarray of transform coefficients and the corresponding subarray from a prior video frame; and encoding the differential array. Each encoded subarray is preceded by a flag to indicate if the encoded data represents the subarray or the differential array.
    Type: Grant
    Filed: October 31, 1997
    Date of Patent: February 29, 2000
    Assignee: TeraLogic, Inc.
    Inventors: Charles K. Chui, Lefan Zhong
  • Patent number: 6009434
    Abstract: A data encoder and method utilizes a node list for storing a list of nodes in the data array to be processed, a branch list for storing a list of tree branches in the data array to be processed and a set list for storing a list of data sets. The method begins by initially storing in the node list node identifiers representing a predefined set of nodes in the data array, corresponding to coefficients generated by a last iteration of a data decomposition procedure. Also, it initially stores in the branch list branch identifiers representing tree branches corresponding to a predefined subset of the nodes initially listed in the node list. Each such tree branch has an associated root node and a branch depth value indicating how many node layers intervene between the root node and the nodes of the tree branch closest to the root node. The set list is initially empty, and a parameter called the LayerLimit value is also initialized.
    Type: Grant
    Filed: October 29, 1998
    Date of Patent: December 28, 1999
    Assignee: Teralogic, Inc.
    Inventors: Charles K. Chui, Rongxiang Yi
  • Patent number: 5949911
    Abstract: A data encoding system and method successively generates compressed data on a bit plane by bit plane basis, starting with the bit position of the most significant non-zero bit for the node in the data array having the largest absolute value, and then encoding the data in the array for progressively less significant bits. All the nodes in the data array are represented initially by blocks of nodes on a block list, and later in the processing by nodes on two node lists. Whenever a block contains a node whose most significant bit is on the bit plane currently being processed, the block will be subdivided recursively until all the nodes in the block whose most significant bit in on the current bit plane are placed in a node list. Data bits representing an m.sup.th least significant bit of the block and node values are written to the compressed data file first, where m is the minimum number of bits required to represent the node having the largest absolute value in the entire data array being encoded.
    Type: Grant
    Filed: May 16, 1997
    Date of Patent: September 7, 1999
    Assignee: TeraLogic, Inc.
    Inventors: Charles K. Chui, Lefan Zhong, Rongxiang Yi
  • Patent number: 5909518
    Abstract: A data processing system and method for performing a wavelet-like transformation and a corresponding inverse wavelet-like transformation is disclosed. The wavelet-like transformation is performed on input data so as to produce decomposed data. For each set of decomposed data samples of the decomposed data, each decomposed data sample of the set is produced by computing a weighted sum of a predefined set of data samples selected from (A) subsets of the set of input data samples, (B) one or more spatially shifted subsets of the set of input data samples, (C) the sets of decomposed data samples, and (D) one or more spatially shifted sets of the sets of decomposed data samples. The weighted sum is computed using only add and bit shift operations. Similarly, the inverse wavelet-like transformation is performed on decomposed data so as to produce reconstructed data.
    Type: Grant
    Filed: November 27, 1996
    Date of Patent: June 1, 1999
    Assignee: Teralogic, Inc.
    Inventor: Charles K. Chui
  • Patent number: 5886651
    Abstract: A data encoder and method successively analyzes successively smaller blocks of a specified data array. Data blocks are analyzed in a predefined order, and corresponding entries identifying data blocks containing at least one non-zero value are stored in that same order in a list of blocks. Whenever a data block is processed, if the data block is entirely filled with zero data it is so identified in the output data and no further processing of the subblock is required. Otherwise, if the size of the data block is greater than a predefined minimum block size (e.g., 2.times.2), the block is divided into smaller data blocks and those smaller data blocks are put on the list of blocks for further processing. Finally, if the size of a data block that is being processed is the predefined minimum block size, values representing all the data items in that data block are written into the output data.
    Type: Grant
    Filed: October 27, 1997
    Date of Patent: March 23, 1999
    Assignee: Teralogic, Inc.
    Inventors: Charles K. Chui, Rongxiang Yi