Patents Assigned to Teramikros, Inc.
  • Publication number: 20140073090
    Abstract: A semiconductor device includes a semiconductor substrate on which a structure portion is provided except a peripheral portion thereof, and has a laminated structure including low dielectric films and wiring lines, the low dielectric films having a relative dielectric constant of 3.0 or lower and a glass transition temperature of 400° C. or higher. An insulating film is formed on the structure portion. A connection pad portion is arranged on the insulating film and connected to an uppermost wiring line of the laminated structure portion. A bump electrode is provided on the connection pad portion. A sealing film made of an organic resin is provided on a part of the insulating film which surrounds the bump electrode. Side surfaces of the laminated structure portion are covered with the insulating film and/or the sealing film.
    Type: Application
    Filed: November 15, 2013
    Publication date: March 13, 2014
    Applicant: TERAMIKROS, INC.
    Inventors: Aiko Mizusawa, Osamu Okada, Takeshi Wakabayashi, Ichiro Mihara
  • Patent number: 8587124
    Abstract: A semiconductor device includes a semiconductor substrate on which a structure portion is provided except a peripheral portion thereof, and has a laminated structure including low dielectric films and wiring lines, the low dielectric films having a relative dielectric constant of 3.0 or lower and a glass transition temperature of 400° C. or higher. An insulating film is formed on the structure portion. A connection pad portion is arranged on the insulating film and connected to an uppermost wiring line of the laminated structure portion. A bump electrode is provided on the connection pad portion. A sealing film made of an organic resin is provided on a part of the insulating film which surrounds the pump electrode. Side surfaces of the laminated structure portion are covered with the insulating film and/or the sealing film.
    Type: Grant
    Filed: June 4, 2008
    Date of Patent: November 19, 2013
    Assignee: Teramikros, Inc.
    Inventors: Aiko Mizusawa, Osamu Okada, Takeshi Wakabayashi, Ichiro Mihara
  • Patent number: 8564128
    Abstract: A semiconductor device comprises a semiconductor substrate having a connection pad, an external connection electrode provided on the semiconductor substrate to be connected to the connection pad, and a sealing film provided to cover the external connection electrode, wherein an opening is provided in the sealing film to expose a center of the upper surface of the external connection electrode, and the sealing film is provided to cover an outer peripheral part of the upper surface of the external connection electrode.
    Type: Grant
    Filed: September 6, 2011
    Date of Patent: October 22, 2013
    Assignee: Teramikros, Inc.
    Inventor: Junji Shiota
  • Patent number: 8525335
    Abstract: A semiconductor construct includes a semiconductor substrate and connection pads provided on the semiconductor substrate. Some of the connection pads are connected to a common wiring and at least one of the remaining of the connection pads are connected to a wiring. The construct also includes a first columnar electrode provided to be connected to the common wiring and a second columnar electrode provided to be connected to a connection pad portion of the wiring.
    Type: Grant
    Filed: July 1, 2010
    Date of Patent: September 3, 2013
    Assignee: Teramikros, Inc.
    Inventors: Shinji Wakisaka, Takeshi Wakabayashi
  • Patent number: 8507309
    Abstract: A photosensor comprises a photoelectric conversion device region and a connection pad on the lower surface of a semiconductor substrate, and also comprises a wiring line connected to the connection pad via insulating film under the semiconductor substrate, and a columnar electrode as an external connection electrode connected to the wiring line. As a result, as compared with the case where the photoelectric conversion device region and the connection pad connected to the photoelectric conversion device region are formed on the upper surface of the semiconductor substrate, a piercing electrode for connecting the connection pad and the wiring line does not have to be formed in the semiconductor substrate. Thus, the number of steps can be smaller, and a fabrication process can be less restricted.
    Type: Grant
    Filed: May 25, 2011
    Date of Patent: August 13, 2013
    Assignee: Teramikros, Inc.
    Inventors: Ichiro Mihara, Takeshi Wakabayashi
  • Patent number: 8487443
    Abstract: Disclosed is a semiconductor structure including a semiconductor substrate including an electronic circuit which is provided in a predetermined region of the semiconductor substrate, a wiring provided on the semiconductor substrate in a region outside of the predetermined region, an external connection electrode provided on the wiring, a sealing resin which covers a side surface of the external connection electrode and a wall which intervenes between the electronic circuit and the sealing resin.
    Type: Grant
    Filed: March 29, 2011
    Date of Patent: July 16, 2013
    Assignee: Teramikros, Inc.
    Inventor: Shinji Wakisaka
  • Patent number: 8421187
    Abstract: A first insulating film includes five extension lines formed between connection pad portions of adjacent two predetermined wiring lines. The first insulating film also includes peripheral portions of the adjacent two connection pad portions on both sides of the five extension lines. A second insulating film made of a polyimide resin or the like is formed on the upper surface of the first insulating layer by a screen printing method or ink jet method. Since a short circuit may be easily caused by electromigration in a region where the five extension lines are parallel to another, the short circuit due to the electromigration can be prevented by covering only that region with the second insulating film. Accordingly, the region where the second insulating film is formed can be as small as possible, and the semiconductor wafer does not easily warp.
    Type: Grant
    Filed: August 2, 2010
    Date of Patent: April 16, 2013
    Assignee: Teramikros, Inc.
    Inventor: Syouichi Kotani
  • Patent number: 8319346
    Abstract: Disclosed is a semiconductor structure including a semiconductor substrate including an electronic circuit which is provided in a predetermined region of the semiconductor substrate; a wall which is formed to encircle the predetermined region of the semiconductor substrate; a wiring provided in a region of the semiconductor substrate outside of the predetermined region of the semiconductor substrate; an external connection electrode provided on the wiring; a sealing resin which seals the wiring, the sealing resin being filled in the region of the semiconductor substrate outside of the wall; and a transparent resin to seal the predetermined region of the semiconductor substrate, the transparent resin being filled inside of the wall.
    Type: Grant
    Filed: March 29, 2011
    Date of Patent: November 27, 2012
    Assignee: Teramikros, Inc.
    Inventor: Shinji Wakisaka
  • Patent number: 8293574
    Abstract: A semiconductor device includes a plurality of semiconductor constructs, each of the semiconductor constructs including a semiconductor substrate and external connection electrodes provided on an upper surface of the semiconductor substrate. The semiconductor substrates of the semiconductor constructs are different in a planar-size. The plurality of semiconductor constructs are stacked from bottom to top in descending order of planar-sizes of the semiconductor substrates included in the plurality of semiconductor constructs. An insulating film at least is provided around one semiconductor construct disposed on the top of the plurality of semiconductor constructs and on another semiconductor construct disposed under the one semiconductor construct. Each of the upper surfaces of the plurality of external connection electrodes is exposed from the one semiconductor construct and from the insulating film.
    Type: Grant
    Filed: March 8, 2010
    Date of Patent: October 23, 2012
    Assignee: Teramikros, Inc.
    Inventor: Ichiro Mihara
  • Patent number: 8278734
    Abstract: Disclosed is a semiconductor device comprising: a semiconductor substrate in which an integrated circuit is formed; a first resin film provided over the semiconductor substrate; a second resin film provided over an upper surface of the first resin film except at least a peripheral portion of the first resin film; and a thin film inductor provided over the second resin film.
    Type: Grant
    Filed: March 23, 2010
    Date of Patent: October 2, 2012
    Assignee: Teramikros, Inc.
    Inventor: Ichiro Mihara
  • Patent number: 8268674
    Abstract: A semiconductor device includes a semiconductor constituent provided with a semiconductor substrate and a plurality of electrodes for external connection provided under the semiconductor substrate. A lower-layer insulating film is provided under and around the semiconductor constituent. A plurality of lower-layer wirings are electrically connected to the electrodes for external connection of the semiconductor constituent, and provided under the lower-layer insulating film. An insulation layer is provided on the lower-layer insulating film in the periphery of the semiconductor constituent. An upper-layer insulating film is provided on the semiconductor constituent and the Insulation layer. A plurality of upper-layer wirings are provided on the upper-layer insulating film. A base plate on which the semiconductor constituent and the insulation layer are mounted is removed.
    Type: Grant
    Filed: August 3, 2010
    Date of Patent: September 18, 2012
    Assignee: Teramikros, Inc.
    Inventor: Hiroyasu Jobetto
  • Patent number: RE43380
    Abstract: A first semiconductor element is mounted on a base plate, and is in a sealed state by the periphery thereof being covered by an insulation member, and the upper surface thereof being covered by an upper insulation film. An upper wiring layer formed on the upper insulation film, and the lower wiring layer formed below the base plate via lower insulation films are connected by conductors. A second semiconductor element is mounted exposed, being connected to the lower wiring layer.
    Type: Grant
    Filed: May 6, 2010
    Date of Patent: May 15, 2012
    Assignee: Teramikros, Inc.
    Inventors: Shinji Wakisaka, Hiroyasu Jobetto, Takeshi Wakabayashi, Ichiro Mihara