Patents Assigned to Teridian Semiconductor Corp.
  • Publication number: 20110267038
    Abstract: The present disclosure describes configurations for current shunt sensors and current shunt sensor assemblies having improved electromagnetic cross-talk rejection that can be used in single-phase/split-phase and poly-phase power metering applications. Some embodiments of the current shunt sensors and current shunt sensor assemblies reduce the need for a shielding material around current shunt sensors in single-phase/split-phase and poly-phase power metering applications. Some embodiments of the current shunt sensors achieve improved electromagnetic cross-talk rejection through a substantially symmetrical arrangement of component parts along the primary path of current flow. Some embodiments of the current shunt sensors achieve improved electromagnetic cross-talk rejection by symmetrical configurations that, in operation, induce complementary parasitic currents or voltages that substantially cancel each other out and do not substantially affect primary current flow through the current shunt sensor.
    Type: Application
    Filed: April 30, 2010
    Publication date: November 3, 2011
    Applicant: TERIDIAN SEMICONDUCTOR CORP.
    Inventors: Wolfhard J. Homma, Carlos A. Laiz, Kourosh Boutorabi
  • Publication number: 20110215794
    Abstract: The present disclosure describes a PDU configured to reduce the risk of an abrupt interruption in the flow of electricity caused by a malfunctioning load or overloading of a PDU output connection. In some embodiments, a PDU is configured to enable the monitoring and control of electricity provided to one or more loads coupled to the PDU. In some embodiments, a PDU is configured to enable remote monitoring and reporting through the use of communication devices.
    Type: Application
    Filed: March 4, 2010
    Publication date: September 8, 2011
    Applicant: TERIDIAN SEMICONDUCTOR CORP
    Inventors: David Richard Gruetter, Kenson Tamotsu Harada
  • Publication number: 20110184675
    Abstract: The present disclosure includes a power measurement, circuit breaker or integrated protection system including isolated analog-to-digital modulators for measuring current using current sensors, such as, for example, current shunts, in a single or multiphase power system. In one embodiment, the modulators are divided into a line-side device with an analog-to-digital modulator and a host-side device including a decimation filter and a processor. In one embodiment, an isolation barrier, such as, for example, a pulse transformer, divides the line-side device from the host-side device.
    Type: Application
    Filed: March 9, 2010
    Publication date: July 28, 2011
    Applicant: Teridian Semiconductor Corp.
    Inventors: Bert White, Kourosh Boutorabi
  • Patent number: 7733965
    Abstract: Encoding of a dual mode digital signal for transfer using a dual mode super source follower circuit to drive the signal across a pulse transformer is presented. The dual mode signal comprises data in one mode and power/control in the other mode. In the power/control mode the magnitude of the signal pulses are greater than the magnitude of the data pulses. Thus, the current sinking deficiencies of the super source follower may introduce waveform irregularities when transitioning from the high of the power pulse to the high of the data pulse. An encoding method described herein uses a return to zero scheme to avoid such waveform irregularities during power to data transitions.
    Type: Grant
    Filed: June 27, 2006
    Date of Patent: June 8, 2010
    Assignee: Teridian Semiconductor Corp.
    Inventor: Russell Hershbarger
  • Patent number: 7724831
    Abstract: A method and apparatus for detection of load impedance modulation as a result of communication of data from the secondary to the primary side of a transformer are presented. The load impedance on the secondary of the transformer barrier is modulated differentially using data to be communicated across the barrier. A detection circuit on the primary side isolates the load current from the magnetizing current in the primary. The load current is subsequently integrated over two consecutive Manchester periods and the integrated value from the first Manchester period is compared against that of the second period thereby recovering the receive data.
    Type: Grant
    Filed: June 27, 2006
    Date of Patent: May 25, 2010
    Assignee: Teridian Semiconductor, Corp.
    Inventors: Kiyoshi Fukahori, Russell Hershbarger
  • Patent number: 7327754
    Abstract: A method for maintaining the states of a receiver during the silent line state of a network device operating in a low power link suspend mode is presented. Accordingly, a method of freezing the states of the equalizer and keeping the receiver clock locked to a frequency that is approximately equal to that of the input data while providing for rapid adjustment to the phase and thus recovery of the input data is presented. During Silent Line State (SLS), the receiver states are frozen using methods that avoid parasitic decay. Also, the receive clock phase lock loop is locked onto the local transmit clock since the local transmit clock has a frequency approximating the incoming data frequency. During the SLS, the transmitter of the remote network device may have been turned off to conserve power therefore the receiver has no way of immediately knowing the phase of an incoming data.
    Type: Grant
    Filed: October 2, 2002
    Date of Patent: February 5, 2008
    Assignee: Teridian Semiconductor, Corp.
    Inventors: Andrew Mills, Ralph Andersson, Anthony Worsham, Michael Nootbaar, David Rosky, Michael Behrin
  • Patent number: 7317732
    Abstract: A method and apparatus for handling data during link suspend pulse and the silent line state of a network device operating in a low power link suspend mode is presented. Accordingly, a new generation of network devices capable of operating in both the full power operational mode of prior art network devices, and a low power “link-suspend” operational mode are presented. The low power “link-suspend” (LS) mode reduces the power consumption of a LAN communications link at the physical layer by eliminating the need to continuously transmit standard idles to maintain link between two linked partners. In the LS mode, a low duty cycle “link-suspend-packet” (LSP) is transmitted between periods of silent line state (SLS). During the SLS, which is a non-data transmission period, the transmitter may be turned off to conserve power therefore preventing the receiver from immediately knowing the phase of an incoming data.
    Type: Grant
    Filed: October 2, 2002
    Date of Patent: January 8, 2008
    Assignee: Teridian Semiconductor, Corp.
    Inventors: Andrew Mills, Ralph Andersson, Anthony Worsham, Michael Nootbaar, David Rosky, Michael Behrin
  • Patent number: 7317691
    Abstract: The invention provides a method for initializing a link suspend device for optimum receive recovery. A method for negotiating link parameters to facilitate rapid recovery of the input data from a silent line state is described. The invention can be applied to network devices in point-to-point data communications links capable of operating in a low power link suspend mode.
    Type: Grant
    Filed: October 2, 2002
    Date of Patent: January 8, 2008
    Assignee: Teridian Semiconductor, Corp.
    Inventors: Andrew Mills, Ralph Andersson, Anthony Worsham, Michael Nootbaar, David Rosky, Michael Behrin
  • Patent number: 7292597
    Abstract: A method and apparatus for transparent implementation of link-suspend capabilities in network devices is presented, which is capable of operating in full or substantially full power operational mode, as well as in a low power “link-suspend” operational mode. The low power “link-suspend” (LS) mode reduces the power consumption of a LAN communications link at the physical layer by eliminating the need to transmit continuous standard idles to maintain link between two linked partners. In the LS mode, a low duty cycle “link-suspend-packet” (LSP) is transmitted between periods of silent line state (SLS). During the SLS, which is a non-data transmission period, the transmitter may be turned off to conserve power. The transmitter power is turned back on when it is time to transmit LSPs or data.
    Type: Grant
    Filed: October 2, 2002
    Date of Patent: November 6, 2007
    Assignee: Teridian Semiconductor Corp.
    Inventors: Andrew Mills, Ralph Andersson, Anthony Worsham, Michael Nootbaar, David Rosky, Michael Behrin