Patents Assigned to Terminus Technology Limited
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Patent number: 8082360Abstract: An associative memory 4 for primary searching operation of an associative memory 23 supplies a valid state to a primary match line 13 corresponding to storage data coincident with search data 10 taking mask information into account, and supplies a value obtained from a result of a logical sum operation (an OR operation), with a valid state for the storage data as true, of all said coincident storage data to a counting means 25 as intermediate data 15. The counting means 25 supplies a result of an operation to the intermediate data 15 for counting the number of bits in an invalid state for the storage data to an associative memory 3 for secondary searching operations as secondary search data 19. Among secondary storage data obtained by carrying out said operation to said storage data, the associative memory 3 for secondary searching operation supplies a result of carrying out the searching operation of the secondary search data 19 to a secondary match line 21.Type: GrantFiled: July 15, 2010Date of Patent: December 20, 2011Assignee: Terminus Technology LimitedInventor: Naoyuki Ogura
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Patent number: 7761599Abstract: An associative memory 4 for primary searching operation of an associative memory 23 supplies a valid state to a primary match line 13 corresponding to storage data coincident with search data 10 taking mask information into account, and supplies a value obtained from a result of a logical sum operation (an OR operation), with a valid state for the storage data as true, of all said coincident storage data to a counting means 25 as intermediate data 15. The counting means 25 supplies a result of an operation to the intermediate data 15 for counting the number of bits in an invalid state for the storage data to an associative memory 3 for secondary searching operations as secondary search data 19. Among secondary storage data obtained by carrying out said operation to said storage data, the associative memory 3 for secondary searching operation supplies a result of carrying out the searching operation of the secondary search data 19 to a secondary match line 21.Type: GrantFiled: October 17, 2007Date of Patent: July 20, 2010Assignee: Terminus Technology LimitedInventor: Naoyuki Ogura
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Patent number: 7397683Abstract: When one or more storage data are coincident with single search data (12), an associative memory (1) carries out logical sum for all of storage data with a valid state for storage data as true. The result of logical sum is used as matched data logical-OR information. In a primary searching operation, the associative memory (1) is supplied with the search data (12) to provide the matched data logical-OR information on matched data logical-OR lines. Then, the associative memory (1) carries out a secondary searching operation supplied as search data with the matched data logical-OR information obtained by all of storage data coincident upon the primary searching operation. Only a match line (5) coincident with the matched data logical-OR information is selected as the secondary search result. The associative memory is used in a network router to calculate an optimum memory address signal (403) by encoding the selected match line (5).Type: GrantFiled: February 21, 2007Date of Patent: July 8, 2008Assignee: Terminus Technology LimitedInventor: Naoyuki Ogura
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Patent number: 7397682Abstract: An associative memory carries out a search operation in plural fields. The search data 3-1 through 3-r in fields, r in number, are supplied to the primary associative memories 20-1 through 20-r. The i-th primary associative memory 20-i carries out the search operation, produces the primary match line 17-1-1 through 17-m-r, and maintains the state of logical AND operation by every word of the primary match line 17-j-1 through 17-j-r, the secondary match line 18-j-1 through 18-j-r, and memory means m-j when primary search enabling signal 10-i is in a valid state. Supplied with the states maintained in the stored information in each word and memory means 43, the primary associative memory 20-i provides the intermediate data 93-i. The secondary associative memory 21-i with words, m in number, searches for the intermediate data 93-i and produces the secondary match line 18-i-1 through 18-i-m when secondary search enabling signal 11-I is in a valid state.Type: GrantFiled: October 17, 2005Date of Patent: July 8, 2008Assignee: Terminus Technology LimitedInventor: Naoyuki Ogura
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Patent number: 7287120Abstract: An associative memory 4 for primary searching operation of an associative memory 23 supplies a valid state to a primary match line 13 corresponding to storage data coincident with search data 10 taking mask information into account, and supplies a value obtained from a result of a logical sum operation (an OR operation), with a valid state for the storage data as true, of all said coincident storage data to a counting means 25 as intermediate data 15. The counting means 25 supplies a result of an operation to the intermediate data 15 for counting the number of bits in an invalid state for the storage data to an associative memory 3 for secondary searching operations as secondary search data 19. Among secondary storage data obtained by carrying out said operation to said storage data, the associative memory 3 for secondary searching operation supplies a result of carrying out the searching operation of the secondary search data 19 to a secondary match line 21.Type: GrantFiled: December 10, 2001Date of Patent: October 23, 2007Assignee: Terminus Technology LimitedInventor: Naoyuki Ogura
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Patent number: 7200712Abstract: This invention needs no priority encoder to connect the plural number of associative memories. The primary searching associative memory 4 of the associative memory 204 produces the intermediate data 6 obtained after the logical sum operation for the coincident storage data in the confirmed valid state, taking the research data 2 and the mask information into account, into the intermediate data determination section 41 and the internal secondary searching associative memory 5. The intermediate data arithmetic section 42 produces the valid state to the valid search signal 45 corresponding to the storage data with the least number of bits in invalid state among the intermediate data 6 supplied from the first through p-th associative memory 204. The first through p-th secondary searching associative memory 5 carries out the search operation for the storage data with the corresponding intermediate data 6 as the search data, supplying the match line 3.Type: GrantFiled: July 24, 2001Date of Patent: April 3, 2007Assignee: Terminus Technology, LimitedInventor: Naoyuki Ogura
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Patent number: 6980452Abstract: An associative memory, a router and a network system incorporating an associative memory are disclosed with high speed data transfer speed and low power consumption. An associative memory is constituted of a first circuit means for conducting a primary search operation for each single word of the storage data so as to exclude a single or plural bits of the storage data from the search object with use of an external search data input to the memory when the mask information corresponding to each single word is in a valid state; a second circuit means for selecting a single or plural words as a candidate data; a third circuit means for conducting a logical AND operation to obtain a matched mask logical AND information between each mask information corresponding to the selected candidate data, with assuming the valid state of the mask information as true; and a fourth circuit means for conducting a first logical operation between the matched mask logical AND information and the search data.Type: GrantFiled: February 20, 2003Date of Patent: December 27, 2005Assignee: Terminus Technology LimitedInventor: Naoyuki Ogura
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Patent number: 6956756Abstract: An associative memory carries out a search operation in plural fields. The search data 3-1 through 3-r in fields, r in number, are supplied to the primary associative memories 20-1 through 20-r. The i-th primary associative memory 20-i carries out the search operation, produces the primary match line 17-1-1 through 17-m-r, and maintains the state of logical AND operation by every word of the primary match line 17-j-1 through 17-j-r, the secondary match line 18-j-1 through 18-j-r, and memory means m-j when primary search enabling signal 10-i is in a valid state. Supplied with the states maintained in the stored information in each word and memory means 43, the primary associative memory 20-i provides the intermediate data 93-i. The secondary associative memory 21-i with words, m in number, searches for the intermediate data 93-i and produces the secondary match line 18-i-1 through 18-i-m when secondary search enabling signal 11-l is in a valid state.Type: GrantFiled: April 25, 2001Date of Patent: October 18, 2005Assignee: Terminus Technology LimitedInventor: Naoyuki Ogura
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Patent number: 6910105Abstract: When one or more storage data are coincident with single search data (12), an associative memory (1) carries out logical sum for all of storage data with a valid state for storage data as true. The result of logical sum is used as matched data logical-OR information. In a primary searching operation, the associative memory (1) is supplied with the search data (12) to provide the matched data logical-OR information on matched data logical-OR lines. Then, the associative memory (1) carries out a secondary searching operation supplied as search data with the matched data logical-OR information obtained by all of storage data coincident upon the primary searching operation. Only a match line (5) coincident with the matched data logical-OR information is selected as the secondary search result. The associative memory is used in a network router to calculate an optimum memory address signal (403) by encoding the selected match line (5).Type: GrantFiled: May 30, 2002Date of Patent: June 21, 2005Assignee: Terminus Technology LimitedInventor: Naoyuki Ogura
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Publication number: 20040168021Abstract: An associative memory, a router and a network system incorporating an associative memory are disclosed with high speed data transfer speed and low power consumption. An associative memory is constituted of a first circuit means for conducting a primary search operation for each single word of the storage data so as to exclude a single or plural bits of the storage data from the search object with use of an external search data input to the memory when the mask information corresponding to each single word is in a valid state; a second circuit means for selecting a single or plural words as a candidate data; a third circuit means for conducting a logical AND operation to obtain a matched mask logical AND information between each mask information corresponding to the selected candidate data, with assuming the valid state of the mask information as true; and a fourth circuit means for conducting a first logical operation between the matched mask logical AND information and the search data.Type: ApplicationFiled: February 20, 2003Publication date: August 26, 2004Applicant: Terminus Technology LimitedInventor: Naoyuki Ogura
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Publication number: 20030225984Abstract: When one or more storage data are coincident with single search data (12), an associative memory (1) carries out logical sum for all of storage data with a valid state for storage data as true. The result of logical sum is used as matched data logical-OR information. In a primary searching operation, the associative memory (1) is supplied with the search data (12) to provide the matched data logical-OR information on matched data logical-OR lines. Then, the associative memory (1) carries out a secondary searching operation supplied as search data with the matched data logical-OR information obtained by all of storage data coincident upon the primary searching operation. Only a match line (5) coincident with the matched data logical-OR information is selected as the secondary search result. The associative memory is used in a network router to calculate an optimum memory address signal (403) by encoding the selected match line (5).Type: ApplicationFiled: May 30, 2002Publication date: December 4, 2003Applicant: Terminus Technology LimitedInventor: Naoyuki Ogura