Patents Assigned to TETRA SEMICONDUCTORS AG
  • Patent number: 11381428
    Abstract: A device (2) for determining optimal equalizer settings (setE_opt) for an equalizer (1) for equalizing a pulse amplitude modulation signal (L0, L1, L2, L3) comprises an estimator section (21) configured for receiving at least a part of the equalized pulse amplitude modulation signal (L0?, L1?, L2?, L3?) from the equalizer (1), and for receiving an offset signal (offS), and for generating an estimator signal (estS) indicative of a percentage of signal levels of the at least a part of the equalized pulse amplitude modulation signal (L0?, L1?, L2?, L3?) which are larger or smaller than the offset signal (offS).
    Type: Grant
    Filed: November 25, 2020
    Date of Patent: July 5, 2022
    Assignee: TETRA SEMICONDUCTORS AG
    Inventors: Martin Bossard, Jörg Wieland, Denis Müller
  • Patent number: 10594523
    Abstract: Disclosed is a decoder circuit for a pulse amplitude modulation signal and a method of decoding a pulse amplitude modulation signal. The pulse amplitude modulation signal has a zeroth signal level, a first signal level, a second signal level and a third signal level. The decoder circuit comprises a first decision circuit, and a mapping circuit. The first decision circuit receives the pulse amplitude modulation signal and generates a low output signal for the first and the zeroth signal level, and generates a high output signal for the third and the second signal level. The mapping circuit receives the pulse amplitude modulation signal and generates a low output signal for the second and first signal level, and generates a high output signal for the third and zeroth signal level. Optionally, the decoder circuit comprises a logic circuit.
    Type: Grant
    Filed: December 22, 2017
    Date of Patent: March 17, 2020
    Assignee: TETRA SEMICONDUCTOR AG
    Inventors: Martin Bossard, Jörg Wieland