Abstract: A circuit for receiving digital signals over a transmission line. A feedback circuit is coupled to an input node of the transmission line and adjusts the input impedance of the receiver circuit to match the characteristic impedance of the transmission line. The feedback circuit includes a first current source controlled by a first voltage and having a first transconductance, and a second current source controlled by the first voltage and having a second transconductance equal to the first transconductance times a first scaling factor. The feedback circuit includes a first resistance element having a resistance equal to the first scaling factor plus one, times the characteristic impedance of the transmission line, and is coupled between the outputs of the first and second current sources.

Abstract: A depletion type DMOS transistor comprises a gap in electrode material allowing incorporation of a well dopant species into the underlying semiconductor material. During subsequent dopant diffusion a continuous well region is obtained having an extended lateral extension without having an increased depth. The source dopant species is implanted after masking the gap. Additional channel implantation is performed prior to forming the gate dielectric material.

Abstract: The present disclosure provides a receiver, a transmitter and methods of operating a receiver and a transmitter. In one embodiment, the receiver includes a receive portion employing transmission signals from a transmitter, having multiple transmit antennas, that is capable of transmitting at least one spatial codeword and adapting a transmission rank. The receiver also includes a feedback generator portion configured to provide a channel quality indicator that is feedback to the transmitter, wherein the channel quality indicator corresponds to at least one transmission rank.

Abstract: Various apparatuses and methods for supplying an electrical current are disclosed herein. For example, some embodiments provide an apparatus including a current regulation switch connected in a current path between a power input and a current output. A current regulator is connected to the current regulation switch. The current regulator includes a current set terminal, and the current through the current regulation switch is proportional to the current through current set terminal. An impedance monitor is connected to the current set terminal.

Abstract: The present invention relates to apparatus and method for re-circulating high viscosity liquids. The apparatus comprises a recirculating probe coupled to a fluid storage and dispensing vessel by a connector, and the recirculating probe comprises: (a) a dip tube defining an output flow path; (b) an output port; (c) a recirculating port; and (d) a return flow path. The output flow path and the return flow path preferably have substantially equal cross-sectional areas, which reduce or eliminate the unbalance between the discharge pressure in the output line and that in the re-circulation line, and prevent premature wearing-out of the dispensing/recirculating pump.

Abstract: Processes for synthesizing graphene films. Graphene films may be synthesized by heating a metal or a dielectric on a substrate to a temperature between 400° C. and 1,400° C. The metal or dielectric is exposed to an organic compound thereby growing graphene from the organic compound on the metal or dielectric. The metal or dielectric is later cooled to room temperature. As a result of the above process, standalone graphene films may be synthesized with properties equivalent to exfoliated graphene from natural graphite that is scalable to size far greater than that available on silicon carbide, single crystal silicon substrates or from natural graphite.

Abstract: A method and semiconductor device for synthesizing graphene using ion implantation of carbon. Carbon is implanted in a metal using ion implantation. After the carbon is distributed in the metal, the metal is annealed and cooled in order to precipitate the carbon from the metal to form a layer of graphene on the surface of the metal. The metal/graphene surface is then transferred to a dielectric layer in such a manner that the graphene layer is placed on top of the dielectric layer. The metal layer is then removed. Alternatively, recessed regions are patterned and etched in a dielectric layer located on a substrate. Metal is later formed in these recessed regions. Carbon is then implanted into the metal using ion implantation. The metal may then be annealed and cooled in order to precipitate the carbon from the metal to form a layer of graphene on the metal's surface.

Abstract: A method and semiconductor device for synthesizing graphene using ion implantation of carbon. Carbon is implanted in a metal using ion implantation. After the carbon is distributed in the metal, the metal is annealed and cooled in order to precipitate the carbon from the metal to form a layer of graphene on the surface of the metal. The metal/graphene surface is then transferred to a dielectric layer in such a manner that the graphene layer is placed on top of the dielectric layer. The metal layer is then removed. Alternatively, recessed regions are patterned and etched in a dielectric layer located on a substrate. Metal is later formed in these recessed regions. Carbon is then implanted into the metal using ion implantation. The metal may then be annealed and cooled in order to precipitate the carbon from the metal to form a layer of graphene on the metal's surface.

Abstract: Systems and methods for identifying a transmission channel response and a feedback channel response from a plurality of composite system responses are disclosed. A plurality of shifted feedback signals are created by shifting a feedback signal frequency by a plurality of first offset values and/or by shifting a transmission signal frequency by a plurality of second offset values. The feedback signals are compared to an input signal to identify the transmission channel response and/or a feedback channel response. A control signal is generated for a pre-distortion circuit to modify the input signal by an inverse of the transmission channel response. The composite system response is measured at a plurality of operating frequencies and at the plurality of offset values. The measurements are stored in a matrix and singular value decomposition is applied to the matrix of measurements to calculate the transmission channel response and feedback channel response.

Abstract: A system and method are disclosed for capturing pre- and post-event data for random events using minimum power. Real-time data is captured and stored in a continuous loop in a segment of a first memory. Upon detection of a designated event, a second memory is powered-on and post-event data is stored to a segment of the second memory. After a designated data capture window, the second memory is powered-off and real-time data is captured in an unused segment of the first memory. The post-event data may be captured in the unused segment of the first memory and later transferred to the second memory. Auto-address logic monitors and controls the storage and retrieval of pre- and post-event in the first and second memory. An energy management system determines and controls which segments of the first and second memory should be powered-on or kept in the stasis mode to store event data.

Abstract: A plurality of sub word lines each have a length equivalent to the division of a main word line along the extension direction thereof, arranged along a bit line crossing said main word line, and are connected with a plurality of memory cells. A first sub word select line arranged in parallel to the main word line is extended to a plurality of sub arrays arranged in the extension direction of the word line. A second sub word select line is connected to the corresponding one of said first sub word select line to be extended orthogonally to a word line driving circuit area of an adjacent sub array. In the sub word line driving circuit provided for each sub array, a sub word line is selected and deselected by signals supplied from said main word line and said second sub word select line.

Abstract: Embodiments of the invention provide a method to allow a software access point (SAP)-enabled device to go to sleep as much as possible without sacrificing throughput and latency across networks. The SAP-enabled device defers transmissions from client stations if maximum end-to-end throughput that can be supported by the networks is below the maximum throughput supported by a connection to the client station.

Abstract: In one aspect provides a method of manufacturing a semiconductor device having improved transistor performance. In one aspect, this improvement is achieved by conducting a pre-deposition spacer deposition process wherein a temperature of a bottom region of a furnace is higher than a temperature of in the top region and is maintained for a predetermined period. The pre-deposition temperature is changed to a deposition temperature, wherein a temperature of the bottom region is lower than a temperature of the top region.

Abstract: Systems and methods for synchronous rectifier control are provided. A synchronous rectifier includes parasitic drain inductance and parasitic source inductance. Compensation inductance is introduced to offset the effects of parasitic inductance. Compensation inductance may be formed from the trace inductance on the semiconductor die. In certain semiconductor packages, the parasitic inductance may be substantially fixed such that the layout can be modified to generate fixed compensation inductance.

Abstract: Processes for synthesizing graphene films. Graphene films may be synthesized by heating a metal or a dielectric on a substrate to a temperature between 400° C. and 1,400° C. The metal or dielectric is exposed to an organic compound thereby growing graphene from the organic compound on the metal or dielectric. The metal or dielectric is later cooled to room temperature. As a result of the above process, standalone graphene films may be synthesized with properties equivalent to exfoliated graphene from natural graphite that is scalable to size far greater than that available on silicon carbide, single crystal silicon substrates or from natural graphite.

Abstract: A method of forming integrated circuits (IC) having at least one metal insulator metal (MIM) capacitor. A bottom electrode is formed on a predetermined region of a semiconductor surface of a substrate. At least one dielectric layer including silicon is formed on the bottom electrode, wherein a thickness of the dielectric layer is <1,000 A. A top electrode layer is formed on the dielectric layer. A patterned masking layer is formed on the top electrode layer. Etching using dry-etching at least in part is used to etch the top electrode layer outside the patterned masking layer to reach the dielectric layer, which removes ?100 A of the thickness of the dielectric layer. The dry etch process includes using a first halogen comprising gas, a second halogen comprising gas that comprises fluorine, and a carrier gas.

Abstract: Embodiments of the invention comprise a system and method for estimating a traffic load on a wireless network. An access point notifies a station that the access point will not receive transmissions during a first quiet period. After the first quiet period, the access point monitors the wireless network during a first monitoring period. If no transmissions are received during the first monitoring period, the access point notifies the station that it will not receive transmissions during a second quiet period. The second quiet period has an equal or longer duration than the first quiet period. The access point alternates between monitoring periods and quiet periods and progressively expands the duration of the quiet periods as long as no transmissions are received during the monitoring periods. If a station notifies the access point that packets are pending at the device, the monitoring period is extended to handle these packets immediately.

Abstract: A method for automatic format detection, video decoder and video display devices therefrom. A video input having an algorithm-based first graphics format is received that carries an RGB video signal, Hsync signal and a Vsync signal. From the Hsync signal and Vsync signal, a plurality of different measured timing parameters are generated including a total number of vertical lines per frame, a total number of vertical lines per pulse width of the Vsync signal, a total number of reference clock cycles per vertical line, and measured polarity information for the Vsync and Hsync signal. An algorithm automatically generates a format detection result that represents the first graphics format using the plurality of different measured timing parameters and the measured polarity information, including a plurality of horizontal and vertical timing information for configuring a video display for the algorithm-based first graphics format.

Abstract: A method and semiconductor device for synthesizing graphene using ion implantation of carbon. Carbon is implanted in a metal using ion implantation. After the carbon is distributed in the metal, the metal is annealed and cooled in order to precipitate the carbon from the metal to form a layer of graphene on the surface of the metal. The metal/graphene surface is then transferred to a dielectric layer in such a manner that the graphene layer is placed on top of the dielectric layer. The metal layer is then removed. Alternatively, recessed regions are patterned and etched in a dielectric layer located on a substrate. Metal is later formed in these recessed regions. Carbon is then implanted into the metal using ion implantation. The metal may then be annealed and cooled in order to precipitate the carbon from the metal to form a layer of graphene on the metal's surface.

Abstract: A method of generating multi-frame test signals, a testing apparatus, and method for testing integrated circuits (ICs) with the multi-frame test signals. An analog source generates an analog source signal at a constant power and a constant frequency that is modulated with a first modulating signal (e.g., I) to output a first test signal having first signal parameters including a power level, a frequency and a modulation scheme. The modulating is repeated with a second modulating signal (e.g., Q) to output a second test signal having second signal parameters including a power level, a frequency and a modulation scheme. At least one of the first and second signal parameters are different. The modulating signals are generated by a digital signal source. The first and second test signal are combined by placing the first test signal on the first frame (frame 1) and the second test signal on the second frame (frame 2) of the multi-frame test signal.