Patents Assigned to Texas Instruments Corporation
  • Patent number: 9667318
    Abstract: Embodiments of the invention provide a device and a frame structure for powerline communications. The header may comprise two parts that are separately encoded. A common header segment is encoded alone, and an embedded header segment is encoded with payload data.
    Type: Grant
    Filed: July 14, 2015
    Date of Patent: May 30, 2017
    Assignee: TEXAS INSTRUMENTS CORPORATION
    Inventors: Badri N. Varadarajan, Anand Dabak, Il Han Kim
  • Patent number: 7087440
    Abstract: The present invention provides, in one embodiment, a method method of monitoring a process for forming a nitridated oxide gate dielectric. A nitrided oxide dielectric layer is formed on a test substrate (110). The nitrided oxide dielectric layer is exposed to an etch process (120). A change in a property of the nitrided oxide dielectric layer is measured as a function of the etch process (130). Other embodiments advantageously incorporate the method into methods for making semiconductor devices and integrated circuits.
    Type: Grant
    Filed: May 23, 2003
    Date of Patent: August 8, 2006
    Assignee: Texas Instruments Corporation
    Inventors: April Gurba, Husam Alshareef, Hiroaki Niimi
  • Patent number: 6297699
    Abstract: A bias rail buffer circuit and method in accordance with the present invention overcomes many shortcomings of the prior art. A bias rail buffer circuit for providing a reference signal is suitably configured to absorb external disturbances appearing on an output reference signal. A method for absorbing the external disturbances appearing at the output reference signal suitably includes the use of complementary transistors to source current and sink current to said output reference signal, depending on whether the external disturbances are providing a decrease or an increase to the output reference signal. The bias rail buffer circuit suitably includes an input transistor, a first pair of complementary transistors and a second pair of complementary transistors, such that the second pair of complementary transistors operate to source current and sink current to absorb external disturbances imparted on said output reference signal.
    Type: Grant
    Filed: October 19, 2000
    Date of Patent: October 2, 2001
    Assignee: Texas Instruments Corporation
    Inventors: Kenneth W. Murray, Joel M. Halbert
  • Patent number: 5592239
    Abstract: A projector device, which is simple and small and able to display images brighter and also able to improve the usefulness considerably. The effective reflecting lights of the mirror deflection type light modulators are focused into images at the position right in front of the projection lens, and the effective reflection lights are partly turned and focused on the two-dimensional position detector means for detecting the vertical and horizontal positions of the formed images.
    Type: Grant
    Filed: July 13, 1994
    Date of Patent: January 7, 1997
    Assignees: Sony Corporation, Texas Instruments Corporation
    Inventors: Nobuyuki Hara, Shigekatsu Tagami
  • Patent number: 5045724
    Abstract: A TTL gate (22) includes a current generating circuit (24) comprising an NPN transistor (30) having its base coupled to a diode (24) and its emitter coupled to one of the gate's output transistors (14). Transistor (30) enables diode (24) to deliver a high current of short duration to the output OUT responsive to a low-to-high output transition. The current provides low-to-high output transition while protecting output transistor (14) from damaging currents caused by a short circuit at output OUT.
    Type: Grant
    Filed: October 18, 1989
    Date of Patent: September 3, 1991
    Assignee: Texas Instruments Corporation
    Inventors: Kevin M. Ovens, Jeffrey A. Niehaus, Bob D. Strong