Patents Assigned to TFPD Corporation
  • Patent number: 7115913
    Abstract: A TFT array substrate used for a display device and a method of making the same are disclosed. A optically transparent thick resin insulation film 5 is formed on a base substrate and an upper contact hole 51 is perforated through the optically transparent thick resin insulation film 5. A lower contact hole 41 perforated through a gate insulation film 15 and patterning of an ITO film to make a transparent pixel electrode are then collectively carried out under a photoresist pattern 8. Where the photoresist pattern 8 is provided after making the ITO film, an aperture 81 is perforated closer to the center of the upper contact hole 51 at an end portion of a connecting line 14a for a pad and is smaller in diameter by a side etching size plus a margin than the upper contact hole.
    Type: Grant
    Filed: March 25, 2003
    Date of Patent: October 3, 2006
    Assignee: TFPD Corporation
    Inventor: Hirotaka Shigeno
  • Patent number: 7042149
    Abstract: A circuit array substrate 10 includes pixel and connecting edge sections 80 and 90. Connecting edge section 90 is provided with edge portions 5a and shoulder portions 55 of transparent thin resin film 5 over which terminal pins 101 of tape carrier packages (TCP) 100 are disposed. Terminal pins 101 are connected to connecting pads 14 at their contact portions 103. Shoulder portions 55 prevent a coated photoresist film from being excessive in depth and residues of the photoresist film from being left in the foot of edge face 5a in the step of forming metal reflective pixel electrodes. Thus, no residue of the metal film exists after its etching treatment in that step so that no electrical short circuits are caused between connecting pads 14 and adjacent terminal pins 101.
    Type: Grant
    Filed: June 9, 2003
    Date of Patent: May 9, 2006
    Assignee: TFPD Corporation
    Inventor: Hirotaka Shigeno
  • Patent number: 7021983
    Abstract: A circuit array substrate 10 includes pixel and connecting edge sections 80 and 90. Connecting edge section 90 is provided with edge portions 5a and shoulder portions 55 of transparent thin resin film 5 over which terminal pins 101 of tape carrier packages (TCP) 100 are disposed. Terminal pins 101 are connected to connecting pads 14 at their contact portions 103. Shoulder portions 55 prevent a coated photoresist film from being excessive in depth and residues of the photoresist film from being left in the foot of edge face 5a in the step of forming metal reflective pixel electrodes. Thus, no residue of the metal film exists after its etching treatment in that step so that no electrical short circuits are caused between connecting pads 14 and adjacent terminal pins 101.
    Type: Grant
    Filed: September 15, 2005
    Date of Patent: April 4, 2006
    Assignee: TFPD Corporation
    Inventor: Hirotaka Shigeno
  • Publication number: 20060009108
    Abstract: A circuit array substrate 10 includes pixel and connecting edge sections 80 and 90. Connecting edge section 90 is provided with edge portions 5a and shoulder portions 55 of transparent thin resin film 5 over which terminal pins 101 of tape carrier packages (TCP) 100 are disposed. Terminal pins 101 are connected to connecting pads 14 at their contact portions 103. Shoulder portions 55 prevent a coated photoresist film from being excessive in depth and residues of the photoresist film from being left in the foot of edge face 5a in the step of forming metal reflective pixel electrodes. Thus, no residue of the metal film exists after its etching treatment in that step so that no electrical short circuits are caused between connecting pads 14 and adjacent terminal pins 101.
    Type: Application
    Filed: September 15, 2005
    Publication date: January 12, 2006
    Applicant: TFPD Corporation
    Inventor: Hirotaka Shigeno
  • Publication number: 20040008167
    Abstract: A circuit array substrate 10 includes pixel and connecting edge sections 80 and 90. Connecting edge section 90 is provided with edge portions 5a and shoulder portions 55 of transparent thin resin film 5 over which terminal pins 101 of tape carrier packages (TCP) 100 are disposed. Terminal pins 101 are connected to connecting pads 14 at their contact portions 103. Shoulder portions 55 prevent a coated photoresist film from being excessive in depth and residues of the photoresist film from being left in the foot of edge face 5a in the step of forming metal reflective pixel electrodes. Thus, no residue of the metal film exists after its etching treatment in that step so that no electrical short circuits are caused between connecting pads 14 and adjacent terminal pins 101.
    Type: Application
    Filed: June 9, 2003
    Publication date: January 15, 2004
    Applicant: TFPD Corporation
    Inventor: Hirotaka Shigeno
  • Publication number: 20030209726
    Abstract: A TFT array substrate used for a display device and a method of making the same are disclosed. A optically transparent thick resin insulation film 5 is formed on a base substrate and an upper contact hole 51 is perforated through the optically transparent thick resin insulation film 5. A lower contact hole 41 perforated through a gate insulation film 15 and patterning of an ITO film to make a transparent pixel electrode are then collectively carried out under a photoresist pattern 8. Where the photoresist pattern 8 is provided after making the ITO film, an aperture 81 is perforated closer to the center of the upper contact hole 51 at an end portion of a connecting line 14a for a pad and is smaller in diameter by a side etching size plus a margin than the upper contact hole.
    Type: Application
    Filed: March 25, 2003
    Publication date: November 13, 2003
    Applicant: TFPD Corporation
    Inventor: Hirotaka Shigeno