Abstract: A method of manufacturing a secondary battery including an electrode body element fabricating step in which a first electrode body element including a positive electrode plate and a negative electrode plate, and a second electrode body element including a positive electrode plate and a negative electrode plate are fabricated, a tab-connecting step in which a first positive electrode tab group of the first electrode body element and a second positive electrode tab group of the second electrode body element are connected to a second positive electrode collector, and a first negative electrode tab group of the first electrode body element and a second negative electrode tab group of the second electrode body element are connected to a second negative electrode collector, and an electrode body fabricating step in which, after the tab-connecting step, the first electrode body element and the second electrode body element are unified.

Abstract: An integrated circuit device includes: a fin-type active area including a fin top surface on a top portion and an anti-punch-through recess having a lowermost level lower than a level of the fin top surface; a nanosheet stack facing the fin top surface, the nanosheet stack including a plurality of nanosheets having vertical distances different from each other from the fin top surface; a gate structure surrounding each of the plurality of nanosheets; a source/drain region having a side wall facing at least one of the plurality of nanosheets; and an anti-punch-through semiconductor layer including a first portion filling the anti-punch-through recess, and a second portion being in contact with a side wall of a first nanosheet most adjacent to the fin-type active area among the plurality of nanosheets, the anti-punch-through semiconductor layer including a material different from a material of the source/drain region.

Abstract: A map displaying method, an electronic device, a storage medium and a terminal device are provided, and relate to the technical fields of computer vision and intelligent transportation. The method includes: receiving a trigger operation in a case that a terminal device displays a map of a first area, and determining a screen coordinate of the trigger point, where the map of the first area is a map where a first position is at a center area; determining a coordinate of a ground projection point corresponding to the trigger point based on the screen coordinate of the trigger point; switching a currently displayed map of the first area to a map of a second area, in a case that the ground projection point falls within the first area, wherein the map of the second area is a map where the ground projection point is at a center area.

Abstract: An automatic focus apparatus for a camera module includes a voice coil motor and a driving unit. The voice coil motor includes a frame, a moving member with a lens, and a magnetic member. The magnetic member is positioned at a side wall of the moving member, the driving unit is positioned at a side plate of the frame. A magnetic field is generated by the driving unit and the magnetic member, the magnetic field drives the moving member with the lens to move, to achieve automatic focus.

Abstract: A voltage conversion circuit includes: an inductor, a first switch module, N second switch modules connected in series, N third switch modules connected in series, and N?1 flying capacitors. One terminal of the first switch module is separately connected to one terminal of the N second switch modules connected in series and one terminal of the N third switch modules connected in series. The other terminal of the N third switch modules connected in series is connected to a positive electrode of a high-voltage power supply. The other terminal of the first switch module and the other terminal of the N second switch modules connected in series are connected to a negative electrode of the high-voltage power supply. A low-voltage power supply is connected to the two terminals of the first switch module through the inductor.

Abstract: A charging device and a charging system are provided. The charging device includes a charging portion and a plurality of magnetic attracting portions. The plurality of magnetic attracting portions are arranged symmetrically with respect to the charging portion. Each of the plurality of magnetic attracting portions includes an N pole and an S pole. At least one of the N poles and/or at least one of the S poles serves as an attracting function pole of the magnetic attracting portion, and a pair of attracting function poles symmetrical with respect to the charging portion are different in polarity.

Abstract: An RISC-V-based 3D interconnected multi-core processor architecture and a working method thereof. The RISC-V-based 3D interconnected multi-core processor architecture includes a main control layer, a micro core array layer and an accelerator layer, wherein the main control layer includes a plurality of main cores which are RISC-V instruction set CPU cores, the micro core array layer includes a plurality of micro unit groups including a micro core, a data storage unit, an instruction storage unit and a linking controller, wherein the micro core is an RISC-V instruction set CPU core that executes partial functions of the main core; the accelerator layer is configured to optimize a running speed of space utilization for accelerators meeting specific requirements, wherein some main cores in the main control layer perform data interaction with the accelerator layer, the other main cores interact with the micro core array layer.

Abstract: A display apparatus is disclosed. The display apparatus includes a display panel configured to drive a frame of a first resolution at a first frame rate, a communication interface comprising circuitry configured to receive content, and a processor configured to, based on a frame rate of the received content being greater than the first frame rate, adjust the received content to a second resolution, and to control the display panel to display a content of the second resolution at a second frame rate, the second frame rate being greater than the first frame rate.

Abstract: A detection element, a manufacturing method thereof and a flat panel detector are disclosed. The detection element includes: a base substrate; a first electrode on the base substrate; a photoelectric conversion layer; a transparent electrode and a second electrode electrically connected with the transparent electrode on a side of the photoelectric conversion layer away from the first electrode. An orthographic projection of the photoelectric conversion layer on the base substrate completely falls within an orthographic projection of the first electrode on the base substrate, in a plane parallel to the base substrate, the transparent electrode is located at a middle portion of the photoelectric conversion, an orthographic projection of a portion of the photoelectric conversion layer not covered by the transparent electrode on the base substrate at least partially falls within an orthographic projection of the second electrode on the base substrate.

Abstract: Embodiments of the present application disclose a multi-level inverter clamping modulation method and apparatus, and an inverter. Switching elements of an inverter are controlled when an output voltage of the inverter crosses zero, and switching elements in each inverter bridge arm of an active clamp multi-level inverter include an internal tube, an external tube, and a clamping tube. The internal tube and the external tube are connected in series between a positive bus and a negative bus, the clamping tube is connected between a common terminal of the internal tube and the external tube and a bus, the internal tube is a low-frequency switching element, and the external tube and the clamping tube are high-frequency switching elements.

Abstract: Methods and systems for horizontal federated learning are described. A plurality of sets of local model parameters is obtained. Each set of local model parameters was learned at a respective client. For each given set of local model parameters, collaboration coefficients are computed, representing a similarity between the given set of local model parameters and each other set of local model parameters. Updating of the sets of local model parameters is performed, to obtain sets of updated local model parameters. Each given set of local model parameters is updated using a weighted aggregation of the other sets of local model parameters, where the weighted aggregation is computed using the collaboration coefficients. The sets of updated local model parameters are provided to each respective client.

Abstract: Method and a UE for managing an IDC issue. The UE includes a memory, a processor, coupled to the memory and communication module based on LTE RAT, configured to transmit capability information on a licensed carrier associated with a primary cell, wherein the UE supports a LAA operation. Further, the processor, coupled to the communication module based on LTE RAT, is configured to receive an IDC indication from the primary cell served by an eNB. Further, the processor, coupled to the communication module based on LTE RAT, configured to detect the IDC issue in an unlicensed band associated with a secondary cell. Further, the processor, coupled to the communication module based on LTE RAT, configured to transmit an IDC message comprising assistance information to the primary cell and receive a message to resolve the IDC issue based on the assistance information from the primary cell served by the eNB.

Abstract: A multi-bit resolution sub-pipeline structure for measuring a jump magnitude of a transmission curve, comprising: a sub-analog-to-digital converter having n-bit resolution configured to quantize input analog voltage signals and output digital voltage signals; a sub-digital-to-analog converter having n-bit resolution configured to convert the digital voltage signals output by the sub-analog-to-digital converter into corresponding analog voltage signals; a decoder having n-bit resolution configured to decode an n-bit binary input signal; and a switched-capacitor amplification unit configured to, when in a normal mode, perform sampling and residue amplification on the input analog voltage signals; and when in a test mode, measure the jump magnitude of the transmission curve corresponding to each decision level. Magnitude measurement of a transmission curve is performed within 2n clock periods, th and a measurement result is sent to a back-end digital domain of the A/D converter for correction.

Abstract: Embodiments herein provide a method for handling a user plane by a UE configured for dual connectivity operation. The method includes receiving a RRC reconfiguration message including one or more Layer 2 indications and a Layer 2 configuration corresponding to one or more radio bearers from one of a MN and a SN involved in a dual connectivity operation of the UE. Further, the method includes performing, by the UE, one of: reestablishing of a RLC entity and a data recovery procedure for a PDCP entity corresponding to the radio bearer based on the one or more Layer 2 indications and the Layer 2 configuration received in the RRC reconfiguration message, and reestablishing of a RLC entity and reestablishing of a PDCP entity corresponding to the radio bearer based on the one or more Layer 2 indications and the Layer 2 configuration received in the RRC reconfiguration message.

Abstract: A signal transmission method, a related device, and a system are provided. The method includes a terminal receiving configuration information, where the configuration information indicates N sets of power control parameters configured for M uplink resources or uplink resource sets, where M?1, M is a positive integer, N>1, and N is a positive integer; and the terminal transmits an uplink signal on the M uplink resources or uplink resource sets, where transmission power for transmitting the uplink signal on the M uplink resources or uplink resource sets is determined based on a first power control parameter, and the first power control parameter is selected from the N sets of power control parameters. According to the foregoing solution, uplink transmission power can be more flexibly adjusted, and power efficiency in uplink transmission and uplink transmission performance can be maximized.

Abstract: Embodiments of 3D memory structures and methods for forming the same are disclosed. The fabrication method includes forming multiple openings in staircase regions, periphery device regions, and substrate contact regions of a 3D NAND memory device. The openings can be formed by a photolithography process followed by multiple etching processes. The openings can include complete openings that expose the underlying layer and mid-way openings where a remaining portion of the photoresist still exists between the opening and the underlying layer. The remaining portion of the photoresist can delay the etching process in the shorter openings for the upper level staircase structure during the formation of the deeper openings for the lower level staircase structure. Conductive material is deposited into the openings to form contact structures for structures such as substrate contact pads, upper and lower level staircase structures, and/or peripheral devices.

Abstract: A polyester resin composition contains a polyester resin A containing 50 to 100 mass % of a polybutylene terephthalate resin and 0 to 50 mass % of a polyethylene terephthalate resin. The polyester resin composition further contains a predetermined amount of a metal organic acid salt B, which is either or both of an alkali metal organic acid salt and an alkaline earth metal organic acid salt; a predetermined amount of a styrenic resin C; and a predetermined amount of an inorganic filler D. The amount of linear oligomers of polybutylene terephthalate or the amount of the linear oligomers of polybutylene terephthalate and linear oligomers of polyethylene terephthalate is less than or equal to 1000 mg/kg. Inorganic filler D has an average particle size of 0.05 to 3 ?m.