Patents Assigned to The International Business Machines Corporation
  • Publication number: 20110320860
    Abstract: Detection, notification and/or processing of events, such as errors associated with adapters, are facilitated. Hardware detects an event, places one or more adapters in an error state to prevent access to/from the adapters, and notifies the operating system of the event.
    Type: Application
    Filed: June 23, 2010
    Publication date: December 29, 2011
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Anthony F. Coneski, David Craddock, Charles W. Gainey, JR., Beth A. Glendening, Thomas A. Gregg, Ugochukwu C. Njoku, Peter K. Szwed
  • Publication number: 20110320873
    Abstract: A method of identifying errors in a computing system operation is provided and includes identifying that a certain record of interest in system trace information has a number of entries that exceeds a predefined number and inferring from the excessive number of entries that a work unit associated with the certain record of interest is affected by an error.
    Type: Application
    Filed: June 24, 2010
    Publication date: December 29, 2011
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Robert M. Abrams, Barbara J. Bryant, Donald T. Durand, Ming-Yin Ng
  • Publication number: 20110316099
    Abstract: A method of forming at least one Micro-Electro-Mechanical System (MEMS) includes forming a lower wiring layer on a substrate. The method further includes forming a plurality of discrete wires from the lower wiring layer. The method further includes forming an electrode beam over the plurality of discrete wires. The at least one of the forming of the electrode beam and the plurality of discrete wires are formed with a layout which minimizes hillocks and triple points in subsequent silicon deposition.
    Type: Application
    Filed: December 20, 2010
    Publication date: December 29, 2011
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: George A. DUNBAR, III, Zhong-Xiang HE, Jeffrey C. MALING, William J. MURPHY, Anthony K. STAMPER
  • Publication number: 20110320695
    Abstract: Various embodiments of the present invention mitigate busy time in a hierarchical store-through memory cache structure. In one embodiment, a cache directory associated with a memory cache is divided into a plurality of portions each associated with a portion memory cache. Simultaneous cache lookup operations and cache write operations between the plurality of portions of the cache directory are supported. Two or more store commands are simultaneously processed in a shared cache pipeline communicatively coupled to the plurality of portions of the cache directory.
    Type: Application
    Filed: June 23, 2010
    Publication date: December 29, 2011
    Applicant: International Business Machines Corporation
    Inventors: Deanna P. BERGER, Michael F. Fee, Christine C. Jones, Arthur J. O'Neill, Diana L. Orf, Robert J. Sonnelitter, III
  • Publication number: 20110317593
    Abstract: Mechanisms are provided for conference call communication in a virtual world environment. The mechanisms establish a hybrid conference call by establishing a hybrid conference call communication connection between a data based communication conference call server, that handles data based communications with client computing devices, and a telephone conference call server, that handles telephone protocol communications with telephone devices external to the virtual world environment. Communications between client computing devices and telephone devices are converted from data based communications to telephone protocol communications and vice versa using a data based communication conference call server and a telephone conference call server.
    Type: Application
    Filed: June 28, 2010
    Publication date: December 29, 2011
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Edward F. Bonkowski, William S. Carter, Thomas E. Cook, Neil A. Katz, Robert S. Smart
  • Publication number: 20110316706
    Abstract: One embodiment involves detecting the fouling of an air filter used to filter airflow entering a computer system. An expected airflow rate is obtained from a current fan speed. An expected temperature rise between two positions is computed as a function of the expected airflow rate and the power consumption of heat-generating components, such as servers. An actual temperature rise is obtained from temperature sensors. An electronic alert is automatically generated in response to the actual temperature rise exceeding the expected temperature rise by a setpoint. Different setpoints may be used to trigger distinct electronic alerts.
    Type: Application
    Filed: June 24, 2010
    Publication date: December 29, 2011
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Kevin M. Cash, Jason A. Matteson, Mark E. Steinke
  • Publication number: 20110320730
    Abstract: A mechanism for data buffering is provided. A portion of a cache is allocated as buffer regions, and another portion of the cache is designated as random access memory (RAM). One of the buffer regions is assigned to a processor. A data block is stored to the one of the buffer regions of the cache according an instruction of the processor. The data block is stored from the one of the buffer regions of the cache to the memory.
    Type: Application
    Filed: June 23, 2010
    Publication date: December 29, 2011
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Michael A. Blake, Timothy C. Bronson, Pak-kin Mak, Craig R. Walters
  • Publication number: 20110316098
    Abstract: A method of forming at least one Micro-Electro-Mechanical System (MEMS) includes forming a lower sacrificial material used to form a lower cavity. The method further includes forming a cavity via connecting the lower cavity to an upper cavity. The cavity via is formed with a top view profile of rounded or chamfered edges. The method further includes forming an upper sacrificial material within and above the cavity via, which has a resultant surface based on the profile of the cavity via. The upper cavity is formed with a lid that is devoid of structures that would interfere with a MEMS beam, including: depositing a lid material on the resultant surface of the upper sacrificial material; and venting the upper sacrificial material to form the upper cavity such the lid material forms the lid which conforms with the resultant surface of the upper sacrificial material.
    Type: Application
    Filed: December 20, 2010
    Publication date: December 29, 2011
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: George A. DUNBAR, III, Jeffrey C. MALING, William J. MURPHY, Anthony K. STAMPER
  • Publication number: 20110321048
    Abstract: A facility is provided for processing to distinguish between a full conventional (or total system) quiesce request within a logically partitioned computer system, which requires all processors of the computer system to remain quiesced for the duration of the quiesce-related operation, and a new early-release conventional quiesce request, which is associated with fast-quiesce request utilization. In accordance with the facility, once all processors have quiesced responsive to a pending quiesce request sequence, the processors are allowed to block early-release conventional quiesce interrupts and to continue processing if there is no total system quiesce request in the pending quiesce request sequence.
    Type: Application
    Filed: June 24, 2010
    Publication date: December 29, 2011
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Ute GAERTNER, Lisa C. HELLER, Jennifer A. NAVARRO
  • Publication number: 20110320832
    Abstract: Systems and methods are provided for managing power to devices in a virtual power delivery network, using a centralized power allocation controller. The method of managing power consumption of a plurality of devices includes receiving device information from one or more devices connected in a virtual power delivery network. The method further includes managing power consumption of the one or more devices in the virtual power delivery network based on the received device information.
    Type: Application
    Filed: June 29, 2010
    Publication date: December 29, 2011
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Gregory J. BOSS, Andrew R. JONES, P. Daniel KANGAS, Kevin C. MCCONNELL, John E. MOORE, JR.
  • Publication number: 20110320840
    Abstract: A mechanism is provided for transparently consolidating resources of logical partitions. Responsive to the existence of the non-folded resource on an originating resource chip, the virtualization mechanism determines whether there is a destination resource chip to either exchange operations of the non-folded resource with a folded resource on the destination chip or migrate operations of the non-folded resource to a non-folded resource on the destination chip. Responsive to the existence of the folded resource on the destination resource chip, the virtualization mechanism transparently exchanges the operations of the non-folded resource from the originating resource chip to the folded resource on the destination resource chip, where the folded resource remains folded on the originating resource chip after the exchange. Responsive to the absence of another non-folded resource on the originating resource chip, the vitalization mechanism places the originating resource chip into a deeper power saving mode.
    Type: Application
    Filed: June 23, 2010
    Publication date: December 29, 2011
    Applicant: International Business Machines Corporation
    Inventors: Naresh Nayar, Karthick Rajamani, Freeman L. Rawson, III
  • Publication number: 20110320504
    Abstract: Provided are techniques for, in response to user input, creating a model that includes at least one icon representing a content object and an event line representing an event, wherein the event has an associated action; configuring a content management system using the model; and, in response to the event being raised, performing the action.
    Type: Application
    Filed: June 28, 2010
    Publication date: December 29, 2011
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventor: Mike A. Marin
  • Publication number: 20110320765
    Abstract: A computer processor, method, and computer program product for executing vector processing instructions on a variable width vector register file. An example embodiment is a computer processor that includes an instruction execution unit coupled to a variable width vector register file which contains a number of vector registers, the width of the vector registers is changeable during operation of the computer processor.
    Type: Application
    Filed: June 28, 2010
    Publication date: December 29, 2011
    Applicant: International Business Machines Corporation
    Inventors: Tejas Karkhanis, Jose E. Moreira, Valentina Salapura
  • Publication number: 20110320704
    Abstract: A content addressable memory system, method and computer program product is described. The memory system comprises a location addressable store having data identified by location and multiple levels of content addressable stores each holding ternary content words. The content words are associated with references to data in the location addressable store. The content store levels might be implemented using different technologies that have different performance, capacity, and cost attributes. The memory system includes a content based cache for improved performance and a content addressable memory management unit for managing memory access operations and virtual memory addressing.
    Type: Application
    Filed: June 23, 2010
    Publication date: December 29, 2011
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventor: Suparna Bhattacharya
  • Publication number: 20110320865
    Abstract: Deduplication in a hybrid storage environment includes determining characteristics of a first data set. The first data set is identified as redundant to a second data set and the second data set is stored in a first storage system. The deduplication also includes mapping the characteristics of the first data set to storage preferences, the storage preferences specifying storage system selections for storing data sets based upon attributes of the respective storage systems. The deduplication further includes storing, as a persistent data set, one of the first data set and the second data set in one of the storage systems identified from the mapping.
    Type: Application
    Filed: June 25, 2010
    Publication date: December 29, 2011
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Bhushan P. Jain, John G. Musial, Abhinay R. Nagpal, Sandeep R. Patil
  • Publication number: 20110320914
    Abstract: Error correction and detection in a redundant memory system that includes a memory controller; a plurality of memory channels in communication with the memory controller, the memory channels including a plurality of memory devices; a cyclical redundancy code (CRC) mechanism for detecting that one of the memory channels has failed, and for marking the memory channel as a failing memory channel; and an error correction code (ECC) mechanism. The ECC is configured for ignoring the marked memory channel and for detecting and correcting additional memory device failures on memory devices located on one or more of the other memory channels, thereby allowing the memory system to continue to run unimpaired in the presence of the memory channel failure.
    Type: Application
    Filed: June 24, 2010
    Publication date: December 29, 2011
    Applicant: International Business Machines Corporation
    Inventors: Luiz C. Alves, Kevin C. Gower, Lisa C. Gower, Luis A. Lastras-Montano, Patrick J. Meaney, Eldee Stephens
  • Publication number: 20110320869
    Abstract: Providing homogeneous recovery in a redundant memory system that includes a memory controller, a plurality of memory channels in communication with the memory controller, an error detection code mechanism configured for detecting a failing memory channel, and an error recovery mechanism. The error recovery mechanism is configured for receiving notification of the failing memory channel, for blocking off new operations from starting on the memory channels, for completing any pending operations on the memory channels, for performing a recovery operation on the memory channels and for starting the new operations on at least a first subset of the memory channels. The memory system is capable of operating with the first subset of the memory channels.
    Type: Application
    Filed: June 24, 2010
    Publication date: December 29, 2011
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Kevin C. Gower, Lisa C. Gower, Luis A. Lastras-Montano, Patrick J. Meaney, Vesselina K. Papazova, Eldee Stephens
  • Publication number: 20110317926
    Abstract: Provided are techniques for receiving data comprising an entity having at least one feature; determining how the entity correlates with an existing entity, identifying an additional feature to increase confidence of the entity resolution, searching a data source for the additional feature to obtain an observation containing the additional feature, and performing the entity resolution using the at least one feature and the additional feature.
    Type: Application
    Filed: June 28, 2010
    Publication date: December 29, 2011
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventor: Jeffrey J. Jonas
  • Publication number: 20110321049
    Abstract: An integrated processor block of the network on a chip is programmable to perform a first function. The integrated processor block includes an inbox to receive incoming packets from other integrated processor blocks of a network on a chip, an outbox to send outgoing packets to the other integrated processor blocks, an on-chip memory, and a memory management unit to enable access to the on-chip memory.
    Type: Application
    Filed: June 25, 2010
    Publication date: December 29, 2011
    Applicant: International Business Machines Corporation
    Inventors: Mark J. Hickey, Eric O. Mejdrich, Adam J. Muff, Paul E. Schardt, Robert A. Shearer, Matthew R. Tubbs, Charles D. Wait
  • Publication number: 20110315343
    Abstract: Cooling apparatuses and methods are provided for immersion-cooling of an electronic subsystem of an electronics rack. The cooling apparatuses include a housing at least partially surrounding and forming a sealed compartment about the electronic subsystem and a dielectric fluid disposed within the sealed compartment, with the electronic subsystem being immersed within the dielectric fluid. A liquid-cooled vapor condenser is provided which includes a plurality of thermally conductive condenser fins extending within the sealed compartment. The condenser fins facilitate cooling and condensing of dielectric fluid vapor generated within the sealed compartment. Within the sealed compartment, multiple thermally conductive condenser fins are interleaved with multiple fluid-boiling fins of a heat spreader coupled to one or more of the electronic components immersed within the dielectric fluid. The interleaved fins facilitate localized cooling and condensing of dielectric fluid vapor within the sealed compartment.
    Type: Application
    Filed: June 29, 2010
    Publication date: December 29, 2011
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Levi A. CAMPBELL, Richard C. CHU, Michael J. ELLSWORTH, JR., Madhusudan K. IYENGAR, Robert E. SIMONS