Abstract: A device may analyze, by one or more processors, a model to identify a first set of model elements that are associated with a model element. The device may apply, by the one or more processors, one or more results from an analysis of the model to a first network unit to determine a complexity of the first network unit or a coupling of the first network unit to other model elements of the model. The device may generate, by the one or more processors, a second network unit, representing a second hierarchy of computation, from the first network unit based on the complexity or the coupling. The device may provide, by the one or more processors, the second network unit as a testing unit for testing the model, the second network unit comprising two or more model elements and one or more numeric expressions.

Abstract: Systems and methods for coverage analysis using context information are described. The systems and methods can be used to obtain program code and test information for testing the program code, the test information associated with context information for providing context for testing the program code. Coverage information can be generated by testing the program code according to the test information. A first association can be generated between the context information and the test information. A second association can be generated between the context information and the program code. A third association can be generated between the coverage information and the test information. A subset of the coverage information can be determined based on the third association and a fourth association between the test information and the program code determined based on the first and second associations. An indication of the subset of the coverage information can be displayed.

Abstract: Systems and methods for services for assisting programming are disclosed. The systems and methods can be used to, during edit time, for program code or data of interest, identify one or more services available to the program code or the data of interest, generating a context for the one or more services, execute code for the one or more services within the context to generate a result for each of the one or more services, analyze the result for each of the one or more services to select a subset of results based on criteria associated with the program code, the data of interest, or the one or more services, and offer, to a user, services corresponding to the subset of results or the subset of results as suggestions to facilitate further development of the program code or use of the data of interest.

Abstract: Systems and methods provide, as part of an executable graphical model, a region for providing variants that includes one or more computational choices defining alternative execution implementations of the region. Conditions assigned to the one or more computational choices indicate which of the computational choices is active. The conditions specify logical expressions of variables that evaluate to True or False. For a given simulation of the executable graphical model, all of the logical expressions may evaluate to False, such that none of the computational choices are active. All of the computational choices of the executable graphical model may be removed for the given simulation.

Abstract: A device receives information that identifies a primary node included in a computational graph. The primary node represents a first operation, that modifies a state value associated with the primary node and a reference node, when the primary node is executed. The device receives information that identifies the reference node included in the computational graph. The reference node represents a second operation, that modifies the state value associated with the primary node and the reference node, when the reference node is executed. The device obtains the computational graph that includes the primary node and the reference node, and executes the primary node and the reference node in a single iteration of the computational graph. The device modifies the state value, associated with the primary node and the reference node, based on executing the primary node and the reference node.

Abstract: The exemplary embodiments may provide an approach to finding and identifying the correlation between the invoking code and the invoked code by correlating the timestamps of contextual information of code in the invoking code and invoked code. As a result, developers have information during investigating the programs and can use the information to identify a region of interest to narrow down a performance problem in the invoking code efficiently. As a result, development productivity can be improved.

Abstract: Systems and methods for syntactical change-resistant code generation are described. A code generator can generate syntactical change-resistant code from original code and new code, where the new code may be intended as a replacement or update for the original code. The code generator can determine, for code portions and/or sub-portions of the new code, whether or not semantic, syntactic, and structural differences from the original code exist. The code generator can generate the syntactical change-resistant code to leverage and include in the syntactical change-resistant code portions and sub-portions of the original code that have been used and tested, so as to improve reliability of the syntactical change-resistant code.

Abstract: Systems and methods for syntactical change-resistant code generation are described. A code generator can generate syntactical change-resistant code from original code and new code, where the new code may be intended as a replacement or update for the original code. The code generator can determine, for code portions and/or sub-portions of the new code, whether or not semantic, syntactic, and structural differences from the original code exist. The code generator can generate the syntactical change-resistant code to leverage and include in the syntactical change-resistant code portions and sub-portions of the original code that have been used and tested, so as to improve reliability of the syntactical change-resistant code.

Abstract: Systems and methods automatically construct a realization of a model from an available set of alternative co-simulation components, where the realization meets one or more objectives, such as fidelity, execution speed, or memory usage, among others. The systems and methods may construct the realization model by setting up and solving a constrained optimization problem, which may select particular ones of the alternative co-simulation components to meet the objectives. The systems and methods may configure the realization, and execute the realized model through co-simulation. The systems and methods may employ and manage different execution engines and/or different solvers to run the realization of the model.

Abstract: In accordance with some embodiments, a non-transitory computer-readable medium storing executable instructions that, when executed by a processor, may cause the processor to receive a value setting via a user interface associated with a first program code, and generate a second program code that, when executed, produces a computational result. To generate the second program code, the instructions, when executed by the processor, may cause the processor to obtain a portion of the first program code that, when executed with the value setting, generates the computational result, determine an organizational structure of the portion, the organizational structure including a plurality of stages, determine, in one or more of the plurality of stages, a first segment of code that accesses the value setting and a second segment of code that does not access the value setting, and replace the first segment with the value setting.

Abstract: Systems and methods may configure a programmable logic device to efficiently run a deep learning (DL) network. Architecture code and algorithmic code may be generated. The architecture code may define convolutional and fully connected processor cores structured to run the layers of a Deep Neural Network (DNN). The processor cores may be interconnected by a First In First Out (FIFO) memory. The architecture code may also define stride-efficient memories for implementing convolution. The algorithmic code may include configuration instructions for running the DNN's layers at the processor cores. The algorithmic code may also include a schedule for executing the configuration instructions on the processor cores, for moving network parameters to the processor cores, and for transferring outputs between the layers.

Abstract: A device may receive data associated with executing a model. The data may be associated with a solver used during execution of the model. The device may determine a presentation order of a plurality of model items based on the data associated with executing the model. The solver may be used to determine values associated with the plurality of model items. The presentation order of the plurality of model items may be determined based on a plurality of factors. The plurality of factors may be associated with the values. The device may generate a graphical interface that indicates the presentation order of the plurality of model items. The device may provide the graphical interface. The graphical interface may provide, for display, a list of the plurality of model items. The list may be provided in association with the presentation order.

Abstract: A system and method intelligently and automatically improves the performance of a model. The system employs heuristics to select a plurality of performance rules that conform to one or more criteria specified for the performance analysis process. The performance rules include checks to be run on the model and offer advice, such as proposed changes that, if made to the model, may improve its performance. The system may evaluate the proposed changes to determine whether or not they produce an improvement in the model's performance. Proposed changes validated as improving model performance are retained, while proposed changes found not to improve performance are removed.

Abstract: A scheduler is provided for tall algorithms that include control flow statements that are dependent on tall computations. Thunks may be defined for the tall algorithms and the boundaries or limits of the thunks may be determined by places where tall variables are required to be gathered. The scheduler executes the tall algorithms by calling individually the thunks from the tall algorithms and pausing when a gather operation is required. The scheduler collectively gathers the tall variables from different tall algorithms by using an optimizer to combine I/O operations for the tall algorithms. The scheduler may put back the gathered variables into the context of each tall algorithm, and the scheduler may resume with the next thunk for each tall algorithm. This process may be repeated until all tall algorithms are finished.

Abstract: In accordance with some embodiments, a method may include displaying, by one or more processors, a user interface (UI) element associated with UI program code, the UI element embedded in first program code. The method may include receiving, by the one or more processors, a first value setting of a UI control of the UI element, and executing, by the one or more processors, the UI program code. The executing may be triggered by the receiving of the first value setting, the executing producing a first result comprising a computational result that is graphically displayed by the UI element. The method may further include generating, by the one or more processors and following the executing, second program code comprising a code portion that, when executed, produces the computational result.

Abstract: Systems and methods generate code from a source program where the generated code may be compiled and executed on a Graphics Processing Unit (GPU). A parallel loop analysis check may be performed on regions of the source program identified for parallelization. One or more optimizations also may be applied to the source program that convert mathematical operations into a parallel form. The source program may be partitioned into segments for execution on a host and a device. Kernels may be created for the segments to be executed on the device. The size of the kernels may be determined, and memory transfers between the host and device may be optimized.

Abstract: Extended types are defined for functions that are called by function handles in a programming environment. The extended types can be accessed and used by a computing system to improve compile-time and run-time performance of the computing system.

Abstract: Systems and methods evaluate simulation models and measure floating point arithmetic errors in terms of Unit in Last Place (ULP). The simulation model may include model elements that perform numerical computations using Native Floating Point (NFP) arithmetic. The model elements may be arranged to implement a procedure. A data store may include local ULP errors predetermined for the model elements. The systems and methods may retrieve the local ULP errors for the model elements included in the model, and may apply a rules-based analysis to compute an overall ULP error of the simulation model. The systems and methods may present the overall ULP computed for the model. The systems and methods may also present intermediate ULP errors determined for portions of the simulation model. Changes may be made to the model to reduce the overall ULP error.

Abstract: Systems and methods for just-in-time compilation are disclosed. The systems and methods can be used to generate composite blocks, reducing program execution time. The systems and methods can include generating single-trace blocks during program execution. Upon satisfaction of a trigger criterion, single-trace blocks can be selected for compilation into a composite block. The trigger criterion can be a number of executions of a trigger block. Selecting the single-trace blocks can include identifying blocks reachable from the trigger block, selecting a subset of the reachable blocks, and selecting an entry point for the composite block. The composite block can be generated from the single-trace blocks and incorporated into the program control flow, such that the composite block is executed in place of the selected single-trace blocks.

Abstract: Systems and methods validate the operation of a component of an executable model without inadvertently altering the behavior of the component. The model may be partitioned into a design space and a verification space. The component may be placed in the design space, while an observer for validating the component may be placed in the verification space, and linked to the component. During execution of the model, input or output values for the component may be computed and buffered. Execution of the observer may follow execution of the component. The input or output values may be read out of the buffer, and utilized during execution of validation functionality defined for the observer. Model compilation operations that may inadvertently alter the behavior of the component, such as back propagation of attributes, are blocked between the observer and the component.