Abstract: Method and systems are provided for representing interfaces between electronic components of a computational hardware device in a graphical model and automatically generating code from the graphical model to implement one or more component interfaces in the computational hardware device. A graphical modeling environment provides for the definition of interface boundaries to represent component interfaces between electronic components associated with partitions of a graphical model design. A code building tool automatically generates code from the graphical model to build executable instructions to run the component interfaces on the electronic components of the computational hardware device.

Abstract: A method of synchronizing a block diagram view of a system being modeled with a three-dimensional view of the system being modeled and with the underlying block diagram model data is disclosed. Changes in the block diagram model data are reflected in both views to the degree that the views contain a point of correspondence. User selected changes to the block diagram view of the system being modeled cause changes in the underlying model data. A view generator examines the model data to determine if a point of correspondence equivalent to the changed portion of the block diagram view exists in the three dimensional view. If a point of correspondence exists in the three-dimensional view the view is updated to reflect the changes in the block diagram view. Similarly, user selected changes in the three-dimensional view cause changes in the underlying block diagram model data.

Abstract: A computer-implemented method may include defining an input bus signal in a graphical block diagram model by associating the input bus signal with a first group of signals, at least two of the first group of signals having a different data type; defining an output bus signal in the graphical block diagram model by associating the second bus signal with a second group of signals, each of the second group of signals corresponding to one of the first group of signals; defining an input to a non-virtual operation block in the graphical block diagram model as the input bus signal; defining an output to the non-virtual operation block in the graphical block diagram as the output bus signal; and simulating an operation performed on the input bus signal by the non-virtual operation block, the operation being performed on each of the first group of signals and output to each of the second group of signals.

Abstract: Methods and apparatus for using description information about a function to translate a call to the function into a call to a corresponding function in a second language. The methods include processing a definition of a function associated with a first language to create description information sufficient to enable translation of a call to the function into a call to a corresponding function in a second language without requiring processing of the definition of the function. In another aspect, the methods include providing a description file of items, each item including description information about a function associated with a first language, and using the file of description items to translate a first program file from the first language into a second language.

Abstract: The invention relates to enabling a user to log data of a block diagram without using a functional logging block within the block diagram. There is a first timing identifier for a first data set based on a timing characteristic of the first data set. There is also a first task identifier established by an execution engine that is associated with a first data set. The logging of the data associated with the first data set is based on the first timing identifier and the first task identifier.

Abstract: Methods and systems are provided for partitioning and distributing the model processing of a graphical model to provide an executable form of the graphical model. The methods and systems determine tasks of the model processing that can be processed separately and concurrently from other tasks. A distribution scheme for distributing the model processing tasks is determined that considers the characteristics of the model processing tasks in view of the characteristics of available computing resources. Variations of partitioning and distributing the model processing tasks can be determined to provide for distributed processing in an optimized or desired manner. The results of the distributed processing of the model processing tasks are obtained and combined to provide an executable form for the graphical model.

Abstract: A mechanism for providing automatic interoperation between native objects created in a single language computing environment and objects created in external virtual machines and foreign class systems is discussed. Embodiments of the present invention provides a class definition syntax for objects created in the single language computing environment that provides the ability to directly subclass external classes and implement external interfaces. One embodiment of the present invention also permits a foreign object system to instantiate native objects and to create foreign subclasses of native classes. More specifically, one embodiment of the present invention provides bidirectional mapping between metadata associated with objects created with each of a plurality of different types of foreign object systems and metadata created in a form supported by the single language computing environment.

Abstract: A language processing environment provides facilities for defining and using handle classes. A handle class is a class that always and only exists as a handle to stored data, yet that data is accessed in the same manner as with non-handle classes. The language processing environment provides syntax such that all values in the language are members of some class and all classes are defined using the same syntax. Methods and properties are supported on both handle and non-handle classes.

Abstract: A programming language type system includes, in a memory, a set of numeric type including integer types, fixed-point types and floating-point types, a set of type propagation rules to automatically determine result types of any combination of integer types, fixed-point types and floating-point types, constant annotations to explicitly specify a result type of a literal constant, context-sensitive constants whose type is determined from a context of a constant according to the set of type propagation rules, an assignment operator to explicitly specify a type of a value or computation, and operator annotations to explicitly specify a result type of a computation.

Abstract: In one embodiment of the present invention, a method for concurrently constructing and testing a software program is provided. The method includes interacting with a program editor that allows a user to construct the program, and testing the program during construction of the program to produce a test result.

Abstract: A cross-platform interface tool provides a common interface for any hardware or software component having some advertising mechanism listing its features, input, and output requirements. The advertising mechanism can take a number of different forms, including data, a software object definition, or a communications system. The cross-platform interface tool includes a parsing mechanism for parsing through a component description associated with at least one of the plurality of components to gather information relating to the components. A component interface creator automatically generates a component interface based on the information gathered by the parsing mechanism.

Abstract: The present invention provides a state diagramming environment in a computing device that enables the conversion of a state diagram into a hardware description language. To achieve this conversion, the present invention generates an intermediate representation of the state diagram. The intermediate representation is checked against a set of predefined restrictions for compliance. The state diagramming environment converts the intermediate representation of the state diagram into a hardware description language, such as VHDL or Verilog.

Abstract: A method, system and computer program product is disclosed for a distributed system with which an arbitrary job manager is able to be interfaced. In the distributed system, a job may be created by a host or client and submitted to the arbitrary job manager for distributing the job to one or more remote workers. The present invention provides interfaces with the arbitrary job manager to establish communication channels to the arbitrary job manager. As such, the present invention allows the use of an arbitrary job manager in the distributed system.

Abstract: An electronic device and method are provided to enable the management of shared code. Code may be shared if the environmental configuration is suitable for execution of the code and the functionality of the code matches. An identifier is provided to correspond to the functionality for a unit of code. Examples of identifiers can include file names, function names, macro names and class names. A checksum may also be used to identify the functionality of the unit of code. An organizational structure is configured to have constituents corresponding to environmental configurations suitable to execute the unit of code. Examples of the organizational structure include a directory structure or a class structure. The various units of code may be stored in the organizational structure and located by the constituent in which they are located and their functionality determined by the identifier to enable sharing.

Abstract: The present invention provides a method and system for stage evaluation of a state machine model. Two types of transitions are used: first-stage transitions and second-stage transitions for a two-stage evaluation. In one embodiment, top-down processing and bottom-up processing may be combined using a two-stage evaluation. First-stage transitions are used with top-down processing while second-stage transitions are used with bottom-up processing. Certain conditions are used to determine if a switch from one type of stage processing to another type of stage processing is needed.

Abstract: A Unified Debugger that enables the debugging of graphical models with combinations of entities from multiple domains such as time-based block diagrams, statecharts, and physical system models, with additional features for the debugging of hand-written and automatically generated code is disclosed. A view of the entity being executed that is consistent with the type of the modeling domain to which the entity currently being executed belongs is automatically generated for a user. Rather than requiring a user to manually transition from one debugger to the next, the Unified Debugger applies the appropriate debugging features from each modeling domain. The Unified Debugger also enables integration of diagnostic information from a multitude of modeling domains into a central user interface. In addition, a standard diagnostic interface which spans a plurality of modeling domains is defined that enables the customization of debug behavior.

Abstract: A computing device-implemented method includes initiating a single programming language, and identifying, via the single programming language, one or more data distribution schemes for executing a program. The method also includes transforming, via the single programming language, the program into a parallel program with an optimum data distribution scheme selected from the one or more identified data distribution schemes, and allocating the parallel program to two or more labs for parallel execution. The method further includes receiving one or more results associated with the parallel execution of the parallel program from the two or more labs, and providing the one or more results to the program.

Abstract: A method and apparatus are disclosed for providing a rate transition block in a graphical modeling environment that is programmable by a user to specify data integrity during a data transfer operation between two operations operating in an asynchronous manner or between an operation operating in an asynchronous manner having a first priority and an operation operating in a synchronous manner having a second priority. The rate transition block is a multi-rate transition block generating code that is portable. The multi-rate transition block has more than one operation operating at more than one operating rate.

Abstract: A computing device-implemented method includes receiving a program, analyzing and transforming the program, determining an inner context and an outer context of the program based on the analysis of the program, and allocating one or more portions of the inner context of the program to two or more labs for parallel execution. The method also includes receiving one or more results associated with the parallel execution of the one or more portions from the two or more labs, and providing the one or more results to the outer context of the program.

Abstract: One or more computer-readable media store executable instructions that, when executed by processing logic, perform parallel processing. The media store one or more instructions for initiating a single programming language, and identifying, via the single programming language, one or more data distribution schemes for executing a program. The media also store one or more instructions for transforming, via the single programming language, the program into a parallel program with an optimum data distribution scheme selected from the one or more identified data distribution schemes, and allocating the parallel program to two or more labs for parallel execution. The media further store one or more instructions for receiving one or more results associated with the parallel execution of the parallel program from the two or more labs, and providing the one or more results to the program.