Abstract: In an embodiment, a method of operating a video system comprises determining an aggregate video data rate based on a video data rate for each of a plurality of cameras, determining a projected retention capability based on the aggregate video data rate and available storage capacity, determining a level of risk that the projected retention capability will not satisfy a required retention capability, determining an adjustment to the video data rate for at least a target camera of the plurality of cameras based on the level of risk.

Abstract: A method of processing image data includes obtaining an image set that includes at least a first image and a second image, determining a deformation registration using the first and second images, wherein the act of determining the deformation registration is performed using a processor, performing image compression on at least a portion of the image set using the determined deformation registration to obtain compressed image data, and storing the compressed image data. A method of processing image data includes obtaining compressed image data, obtaining a deformation registration previously used to create the compressed image data, performing image decompression on the compressed image data using the deformation registration to obtain decompressed image data, wherein the act of performing the image decompression is performed using a processor, and storing the decompressed image data.

Abstract: The present invention relates to a pin-less registration and inductive heating system involving the use of a pre-alignment station for imaging an initial position of a laminate element, an imaging and computer operation control system for determining a required correction factor between an alignment of the laminate element at the pre-alignment station and a preferred stack orientation for the laminate element, and an alignment and transfer system for securely gripping, transferring, and repositioning a laminate element from a top position to the preferred stack orientation employing a preferred four-axis orientation.

Abstract: An implantable device including a conjugate formed of an acrylamide-based copolymer and a bioactive agent is provided.

Abstract: A method including requesting access to a resource governed by a spinlock; determining an allocation of the resource to a further requester; determining an expiration of a time limit for the spinlock, if the resource is allocated to the further requester; and initiating a fault recovery, if the time limit is expired.

Abstract: Improved methods and apparatuses for removing residue from the interior surfaces of the deposition reactor are provided. The methods involve increasing availability of cleaning reagent radicals inside the deposition chamber by generating cleaning reagent radicals in a remote plasma generator and then further delivering in-situ plasma energy while the cleaning reagent mixture is introduced into the deposition chamber. Certain embodiments involve a multi-stage process including a stage in which the cleaning reagent mixture is introduced at a high pressure (e.g., about 0.6 Torr or more) and a stage the cleaning reagent mixture is introduced at a low pressure (e.g., about 0.6 Torr or less).

Abstract: Systems and methods are described for providing network route redundancy through Layer 2 devices, such as a loop free Layer 2 network having a plurality of switching devices. A virtual switch is coupled to the loop free Layer 2 network, the virtual switch having two or more switches configured to transition between master and backup modes to provide redundant support for the loop free Layer 2 network, the switches communicating their status through use of a plurality of redundancy control packets. The system also includes means for allowing the redundancy control packets to be flooded through the Layer 2 network. The means may include time-to-live data attached to the redundancy control packet which is decremented only when the packets are transferred through devices which are configured to recognize the protocol used in redundancy control packets.

Abstract: A spatially efficient kinematic mirror mount for mounting a mirror or other optical element to a housing. The kinematic mirror mount may include three spaced-apart constraint structures, positioned at or near the outer perimeter or circumference of the mirror. The constraint structures constrain the mirror to lie within a plane, typically the x-y plane defined by the orientation of the housing, substantially without overconstraining the mirror. To accomplish this, each of the three constraint structures may constrain the mirror in the x-y plane by independently providing a tangential constraint to the mirror. The constraint structures may include a tab, coupled to the mirror by a flexure, and a fastening assembly for securing the tab to the housing.

Abstract: An aspect of the present invention provides a system for transferring a plurality of non-oriented items. The system includes a feeding area, a conveyor and a rail. The conveyor has a first end, a second end, a conveyor length disposed between the first end and the second end, a conveyor first side, a conveyor second side, a conveyor width disposed between the conveyor first side and the conveyor second side, and a conveyor ledge along the second side. The rail is disposed above the conveyor and from the conveyor ledge at a distance equal to one of the item height, the item width and the item length. A first portion of the plurality of non-oriented items will convey along the conveyor path. A second portion of the plurality of non-oriented items will fall off the conveyor ledge. ledge.

Abstract: A pressure regulated flow valve which compensates for the decreasing internal pressure inside a pressurized product dispensing container using substantially insoluble compressed gas. Where the internal pressure within the pressurized product dispensing container decreases below a certain threshold pressure, the pressure regulated valve provides for an increase in the flow of the product being dispensed from the pressurized container via the pressure regulated flow valve.

Abstract: Systems, apparatus, and methods of static timing analysis for an integrated circuit design in the presence of noise are disclosed. The integrated circuit design may be partitioned into a plurality of circuit stages. A timing graph including timing arcs is constructed to represent the timing delays in circuit stages of the integrated circuit design. A model of each circuit stage may be formed including a model of a victim driver, an aggressor driver, a victim receiver, and a victim net and an aggressor net coupled together. For each timing arc in the timing graph, full timing delays may be computed for the timing arcs in each circuit stage.

Abstract: In one embodiment of the invention, a method of analyzing a circuit design is disclosed. In the method of analyzing a circuit design, a circuit is levelized into multiple levels. Circuit simulations of elements at a level are determined using circuit simulators, one for each element and in parallel in level order. Topological circuit loops may be removed from the circuit. Circuit simulation of the circuit may be performed on the circuit using the circuit simulations determined by the circuit simulators at each level of the circuit.

Abstract: A memory mapping system for compactly mapping dissimilar memory systems and methods for manufacturing and using same. The mapping system maps a source memory system into a destination memory system by partitioning the source memory system and disposing memory contents within the partitioned source memory system into the destination memory system. In one embodiment, the mapping system factorizes a source data width of the source memory system in terms of a destination data width of the destination memory system to form at least one data sub-width. A source memory sub-region is defined for each data sub-width. The memory contents associated with each source memory sub-region are disposed within the destination memory system in a side-by-side manner across selected destination memory registers of the destination memory system. The mapping system thereby can compactly map the memory contents into the destination memory system without a loss of valuable memory space.

Abstract: The present invention relates to a physiological recording electrode, and, more particularly, to an EEG (electroencephalography) recording electrode that can be used without the need for numerous steps in preparing the subject's skin and the electrode itself. The invention further relates to a surface feature or penetrator with a size and shape which that will not bend or break, which limits the depth of application, and/or anchors the electrode or other device during normal application; and a packaging system comprising a well and electrolytic fluid for maintaining a coating of said electrolytic fluid on the surface feature or penetrator.

Abstract: Disclosed are methods and systems for providing a constraint-driven environment for implementing a physical design of an electronic circuit with automatic snapping. In some embodiments, the method identifies or creates an incomplete layout. The method identifies an object and constraints for the object. The method then identifies an approximate position for the object in the layout and automatically snaps the object to a drop location based on the approximate position while complying with relevant constraint(s). The method may further align an object with another object with some spacing in between in some embodiments. The method may also perform automatic layer-to-layer snapping between two sets of objects such as cell instances, each having at least one object on multiple layers.

Abstract: This invention provides methods, compositions, and kits relating to biomarkers whose expression levels are correlated with diffuse large B-cell lymphoma (DLCBL) patients' response to treatment with a CD20 antagonist, such as a CD20 antibody, exemplified by rituximab. The methods, compositions, and kits of the invention can be used to identify DLBCL patients who are likely or not likely, to respond to anti-CD20 treatments.

Abstract: A system, method, and computer program product is disclosed for performing electrical analysis of a circuit design. A voltage-based approach is described for performing two-stage transient EM-IR drop analysis of an electronic design. A two-stage approach is performed in some embodiments, in which the first stage operates by calculating the voltage at certain interface nodes. In the second stage, simulation is performed to simulate the circuit to concurrently obtain the current at the interface nodes.

Abstract: A device includes a key store memory that stores one or more cryptographic keys. A rule set memory stores a set of rules for accessing the cryptographic keys. A key store arbitration module grants access to the cryptographic keys in accordance with the set of rules. The device can be used in conjunction with a key ladder. The device can include a one-time programmable memory and a load module that transfers the cryptographic keys from the one one-time programmable memory to the key store memory and the set of rules to the rule set memory. A validation module can validate the cryptographic keys and the set of rules stored in the key store and rule set memories, based on a signature defined by a signature rule.