Abstract: A deep SPAD structure uses the substrate as the anode terminal of its multiplication p-n junction. A bias voltage for the SPAD (in excess of the SPAD's breakdown voltage) is coupled to the SPAD's cathode terminal. The bias voltage is generated by a charge pump circuit which is also integrated on the substrate. The charge pump circuit is configured to isolate the bias voltage on the cathode terminal. A triple well CMOS process is used to isolate the transistors of the charge pump circuit from the substrate.
Type:
Application
Filed:
January 8, 2014
Publication date:
July 10, 2014
Applicants:
THE UNIVERSITY COURT OF THE UNIERSITY OF EDINBURGH, STMICROELECTRONICS (RESEARCH & DEVELOPMENT) LIMITED
Inventors:
Eric Alexander Garner Webster, Robert K. Henderson