Abstract: In a volumetric data storage apparatus comprising a plurality of stacked matrix-addressable memory devices electrode means are provided so as to form alternating word and bit line means for the memory devices, whereby the number of the electrode means is only one more than the number of memory devices. Moreover adjoining electrode means are arranged in such a manner as to furnish a high proportion of memory cells which can be switched in two or more directions, thus yielding a much higher output when addressed and having an improved signal-to-noise ratio. Each memory device can, due to having a dense electrode arrangement, be provided with an attainable memory cell fill factor approaching unity and half the memory cells can in case be provided switchable in two or more directions, such that the fill factor of these in any case shall approach 0.5.