Abstract: High-frequency thin film chip attenuators can include a substrate having a first side and a second side, a first portion coupled to the first side of the substrate, and a second portion coupled to the second side of the substrate. The first portion can include a ground section, an input contact section, and an output contact section. The second portion can include a ground section, an input section, an output section, and a plurality of resistive sections providing electrical communication between the input section, the output section, and the ground section. The resistive sections can be arranged in an attenuation configuration to attenuate a signal received at the input section and output via the output section. A plurality of through-holes extending through the substrate can provide electrical communication between sections on the first side of the substrate and associated sections on the second side of the substrate.

Abstract: High-frequency thin film chip attenuators can include a substrate having a first side and a second side, a first portion coupled to the first side of the substrate, and a second portion coupled to the second side of the substrate. The first portion can include a ground section, an input contact section, and an output contact section. The second portion can include a ground section, an input section, an output section, and a plurality of resistive sections providing electrical communication between the input section, the output section, and the ground section. The resistive sections can be arranged in an attenuation configuration to attenuate a signal received at the input section and output via the output section. A plurality of through-holes extending through the substrate can provide electrical communication between sections on the first side of the substrate and associated sections on the second side of the substrate.

Abstract: A thin film circuit module constructed for serial coupling to circuit conductors at printed and transmission line circuits. In one form of equalizer construction, thin film circuit elements are deposited on a supporting substrate and wherein a capacitor plate is defined a circuit resistor. Two connector applications serially couple the equalizer modules to trace conductors of a motherboard connector block and to cylindrical core conductors of a coaxial connector. Other hybrid equalizer constructions provide modules constructed of thin film resistors and pick-and-placed capacitors mounted piggyback to an equalizer module substrate.

Abstract: Conformal-coated devices packaged to be compatible with automated handling equipment. In one arrangement, open-sided, injection-molded shells are mounted around conformal-coated devices to provide dimensionally stable packaging that is compatible with device carriers and automated packaging tool heads that are indexed to select and place the devices. In another arrangement, the coating is heated and additional material is added and re-flowed to define unique surface regions compatible with automated handling equipment.

Abstract: Thin film, multi-layered components wherein the layers are hermetically sealed with a re-flowed conductive sealant (e.g. Pb/Sn solder). The sealant is applied to an endless ground conductor at the peripheral edge of at least one of each pair of opposed substrate layers prior to registering the conductors and re-flowing the sealant. The microstrip conductors comprise thin film adhesion and seed layers and a covering metalization. The signal and ground conductors are terminated with solder balls and the signal and ground conductors are connected with micro vias that extend through the substrates.

Abstract: A thin film transmission line, delay line constructed on a ceramic substrate. A serpentine, transmission line conductor and a surrounding, coplanar border ground are plated in registry onto the substrate. Discrete ground paths which project from the border are interspersed between the conductor windings to electrically shield adjacent windings. A hard coat epoxy resin covers the signal layer, which may support a sputtered ground plane that is connected to the border ground. An alternative delay line provides overlying ground fingers within the dielectric covering layer which are aligned to the channel spaces between the conductor windings. Both assemblies provide an increased number of conductor lines per chip. Edge coupled terminations are provided at the substrate to accommodate multi-layer assemblies of the delay line and/or circuit terminations.

Abstract: A flexible laminated delay line assembly formed to include a plurality of patterned regions which may be folded into sandwiched relation to one another without affecting electrical continuity. The transmission line layer is laminated between successively adjacent dielectric and ground plane layers. Windows cut into the ground plane and dielectric layers facilitate folding and decoupling of a support spine, folding of the conductor sections and sizing of the assembly. In one construction, the dielectric layers comprise a flexible insulative substrate laminated between upper and lower thermoset layers. In another construction the dielectric layers comprise a polyetherimide that is melt flowed about the pathways of the transmission line.

Abstract: Multi-layered, thick/thin film, nanosecond delay lines, the inductive/capacitive characteristics of which are tailored to provide line impedances yielding unit delays of 1 to 10 nanoseconds. The delay lines are constructed on a supporting ceramic, resin/fiber or plastic substrate. In alternative embodiments, a serpentine conductive layer of tailored line widths and conductor spacings is sandwiched relative to overlying dielectric layers of 25 to 200 microns thickness and associated ground plane layers. In another embodiment, multiple conductor layers are sandwiched relative to intervening dielectric and ground plane layers. Lateral contact pads/pins, vertical vias and jumper conductors permit circuit connection and interconnection of the layers.

Abstract: In a chip resistor made of thin film having its connecting electrodes for connecting the resistor to a substrate, the connecting electrodes are coated with electrical conducting paint then soldering is performed so as to ensure soldering of the connecting electrodes to the substrate.

Abstract: A delay line device comprises a transmission path formed by a thin film of an electrically conductive material on one surface of a substrate in a zigzag-shape in plan view and a ground electrode formed on another surface of the substrate to provide an inductance part and a capacitor part similar to an ideal distributed parameter circuit. The delay line device has a sufficiently high characteristic impedance for transmitting a high speed pulse signal with low distortion.