Patents Assigned to THINCI INC.
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Publication number: 20200098084Abstract: The described embodiments include systems, methods, and apparatuses for increased efficiency processing flow. One method includes a plurality of stages configured to process an execution graph that includes a plurality of logical nodes with defined properties and resources associated with each logical node of the plurality of logical nodes, a recirculating ring buffer, wherein the recirculating ring buffer is configured to holding only any one of a control information, input, and, or out data necessary to stream a temporary data between each logical node of the execution graph, and a data producer, wherein the data producer is configured to stall from writing control information into a command buffer upon the command buffer being full, preventing command buffer over-writing.Type: ApplicationFiled: November 28, 2019Publication date: March 26, 2020Applicant: ThinCI, Inc.Inventors: Val G. Cook, Satyaki Koneru, Ke Yin, Dinakar C. Munagala
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Publication number: 20190325551Abstract: The claimed invention discloses system comprising a plurality of logical nodes comprised in a single or plurality of stages, with defined properties and resources associated with each node, for reducing compute resources, said system further comprising: at least a recirculating ring buffer holding only any one of a control information, input, and, or out data necessary to stream a temporary data between node and, or nodes in an execution graph, thereby reducing size of said recirculating ring buffer; said recirculating ring buffer being sufficiently reduced in size to reside in an on-chip cache, such that any one of the control information, input, and, or out data between node and, or nodes need not be stored in memory; wherein the control information further comprises a command related to invalidating any one of the input and, or out data held in a recirculating ring data buffer, clearing the buffer of tasked data; and wherein a producer is stalled from writing any more control information into a recirculatiType: ApplicationFiled: May 18, 2019Publication date: October 24, 2019Applicant: Thinci, Inc.Inventors: Val G. Cook, Satyaki Koneru, Ke Yin, Dinakar C. Munagala
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Patent number: 10311542Abstract: The claimed invention discloses system comprising a plurality of logical nodes comprised in a single or plurality of stages, with defined properties and resources associated with each node, for reducing compute resources, said system further comprising: at least a recirculating ring buffer holding only any one of a control information, input, and, or out data necessary to stream a temporary data between node and, or nodes in an execution graph, thereby reducing size of said recirculating ring buffer; said recirculating ring buffer being sufficiently reduced in size to reside in an on-chip cache, such that any one of the control information, input, and, or out data between node and, or nodes need not be stored in memory; wherein the control information further comprises a command related to invalidating any one of the input and, or out data held in a recirculating ring data buffer, clearing the buffer of tasked data; and wherein a producer is stalled from writing any more control information into a recirculatiType: GrantFiled: March 6, 2017Date of Patent: June 4, 2019Assignee: THINCI, Inc.Inventors: Val G. Cook, Satyaki Koneru, Ke Yin, Dinakar C. Munagala
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Patent number: 9640150Abstract: Methods, systems and apparatuses for selecting graphics data of a server system for transmission are disclosed. One method includes reading data from memory of the server system, checking if the data is being read for the first time, checking if the data was written by a processor of the server system during processing, comprising checking if the data is available on a client system or present in a transmit buffer, placing the data in the transmit buffer if the data is being read for the first time and was not written by the processor during the processing as determined by the checking if the data was written by the processor of the server system during processing, wherein if the data is being read for the first time and was written by the processor of the server system during processing the data is not placed in the transmit buffer.Type: GrantFiled: May 19, 2016Date of Patent: May 2, 2017Assignee: ThinCI, Inc.Inventors: Satyaki Koneru, Ke Yin, Dinakar C. Munagala
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Patent number: 9589388Abstract: Embodiments disclosed include a mechanism in a system and method for significantly reducing power consumption by reducing computation and bandwidth. This mechanism is particularly applicable for modern 3D synthetic images which contain high pixel overdraw and dynamically generated intermediates images. Only blocks of computation which contribute to the final image are performed. This is accomplished by rendering in reverse order and by performing multiple visibility sort in a streaming fashion through the pipeline. Rendering of dynamically generated intermediate images is performed sparsely by projecting texture coordinates from a current image back into one or more dependent images in a recursive manner. The newly computed pixel values are then filtered and control is returned to the sampling shader of the current image. When only visible pixels are projected optimal computation is performed. Several implementations are presented with increasing efficiency.Type: GrantFiled: July 9, 2014Date of Patent: March 7, 2017Assignee: ThinCI, Inc.Inventors: Val G. Cook, Satyaki Koneru, Ke Yin, Dinakar C. Munagala
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Patent number: 9373152Abstract: Methods, systems and apparatuses for selecting graphics data of a server system for transmission are disclosed. One method includes a plurality of graphic render passes, wherein one or more of the graphics render passes includes reading data from graphics memory of the server system. The data read from the graphics memory is placed in a transmit buffer if the data is being read for the first time, and was not written by a processor of the server system. One system includes a server system including graphics memory, a frame buffer and a processor. The server system is operable to read data from the graphics memory. The server system is operable to place the data in a transmit buffer if the data is being read for the first time, and was not written by the processor during rendering.Type: GrantFiled: May 25, 2014Date of Patent: June 21, 2016Assignee: ThinCI, Inc.Inventors: Satyaki Koneru, Ke Yin, Dinakar C. Munagala
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Publication number: 20110310105Abstract: Methods, systems and apparatuses for selecting graphics data of a server system for transmission are disclosed. One method includes reading data from graphics memory of the server system. The data read from the graphics memory is placed in a transmit buffer if the data is being read for the first time, and was not written by a processor of the server system. One system includes a server system including graphics memory, a frame buffer and a processor. The server system is operable to read data from the graphics memory. The server system is operable to place the data in a transmit buffer if the data is being read for the first time, and was not written by the processor during rendering.Type: ApplicationFiled: June 16, 2011Publication date: December 22, 2011Applicant: THINCI INC.Inventors: Satyaki Koneru, Ke Yin, Dinakar Munagala