Patents Assigned to Think Silicon Research and Technology Single Member S.A.
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Publication number: 20240054702Abstract: A system and method for rendering vector graphics using precomputed textures, includes receiving a vector image, the vector image including a plurality of instructions, each instruction for rendering at least a geometric primitive; detecting in the plurality of instructions an instruction for generating a first Bezier curve; selecting a first precomputed curve in a texture map to match the first Bezier curve; and generating a raster image based at least on the first precomputed curve. In an embodiment selecting the first precomputed curve includes computing a transformation matrix between the first precomputed curve and target coordinates, wherein the target coordinates are coordinates of a display; computing texture coordinates based on the computed transformation matrix and the texture map; and rendering an adapted precomputed curve, based on the texture map and the computed texture coordinates.Type: ApplicationFiled: October 24, 2023Publication date: February 15, 2024Applicant: Think Silicon Research and Technology Single Member S.A.Inventors: Ioannis OIKONOMOU, Georgios KERAMIDAS
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Patent number: 11893667Abstract: A system and method for rendering vector graphics using precomputed textures, includes receiving a vector image, the vector image including a plurality of instructions, each instruction for rendering at least a geometric primitive; detecting in the plurality of instructions an instruction for generating a first Bezier curve; selecting a first precomputed curve in a texture map to match the first Bezier curve; and generating a raster image based at least on the first precomputed curve. In an embodiment selecting the first precomputed curve includes computing a transformation matrix between the first precomputed curve and target coordinates, wherein the target coordinates are coordinates of a display; computing texture coordinates based on the computed transformation matrix and the texture map; and rendering an adapted precomputed curve, based on the texture map and the computed texture coordinates.Type: GrantFiled: April 6, 2022Date of Patent: February 6, 2024Assignee: THINK SILICON RESEARCH AND TECHNOLOGY SINGLE MEMBER S.A.Inventors: Ioannis Oikonomou, Georgios Keramidas
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Publication number: 20230316605Abstract: A system and method for rendering vector graphics using precomputed textures, includes receiving a vector image, the vector image including a plurality of instructions, each instruction for rendering at least a geometric primitive; detecting in the plurality of instructions an instruction for generating a first Bezier curve; selecting a first precomputed curve in a texture map to match the first Bezier curve; and generating a raster image based at least on the first precomputed curve. In an embodiment selecting the first precomputed curve includes computing a transformation matrix between the first precomputed curve and target coordinates, wherein the target coordinates are coordinates of a display; computing texture coordinates based on the computed transformation matrix and the texture map; and rendering an adapted precomputed curve, based on the texture map and the computed texture coordinates.Type: ApplicationFiled: April 6, 2022Publication date: October 5, 2023Applicant: Think Silicon Research and Technology Single Member S.A.Inventors: Ioannis Oikonomou, Georgios Keramidas
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Publication number: 20230134845Abstract: A system and method for reducing power consumption in processing artificial neural networks utilizes memoization techniques. The method includes receiving computer code representing a neural network model, the neural network model including an input layer having a first plurality of nodes, and an output layer having a second plurality of nodes; detecting in the computer code a cacheable block of instructions, the cacheable block of instructions including an input and an output, wherein the input and the output are local to the cacheable block of instructions; determining a first power consumption corresponding to retrieving a value from a value cache; determining a second power consumption corresponding to executing the cacheable block of instructions; and storing in the value cache an input value corresponding to the input and an output value corresponding to the output, in response to determining that the second power consumption is higher than the first power consumption.Type: ApplicationFiled: October 26, 2022Publication date: May 4, 2023Applicant: Think Silicon Research and Technology Single Member S.A.Inventors: Georgios KERAMIDAS, Iakovos STAMOULIS
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Publication number: 20230136786Abstract: A system and method for increasing cache hits in a value cache utilizing memoization is disclosed. The method includes receiving an input matrix for a parallel processing circuitry, wherein the parallel processing circuitry configured to process the input matrix with a second matrix; selecting a portion of the input matrix, wherein the portion includes a plurality of values; adjusting a first value of the plurality of values based on a second value of the plurality of values; generating a new input matrix based on the input matrix and the adjusted first value; and configuring the parallel processing circuitry to process the new input matrix with the second matrix.Type: ApplicationFiled: October 31, 2022Publication date: May 4, 2023Applicant: Think Silicon Research and Technology Single Member S.A.Inventors: Georgios KERAMIDAS, Iakovos STAMOULIS
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Publication number: 20230140178Abstract: A system and method for improving parallel processing utilizes increased cache hits in a value cache utilizing memoization. The method includes receiving an input matrix for a parallel processing circuitry, the parallel processing configured to process the input matrix with a second matrix; selecting a portion of the input matrix, the portion having a plurality of values in binary representation; adjusting a first value of the plurality of values to a value which is a power of two; adjusting a second value of the plurality of values based on a third value of the plurality of values; generating a new input matrix based on the input matrix and the adjusted first value; and configuring the parallel processing circuitry to process the new input matrix with the second matrix.Type: ApplicationFiled: October 31, 2022Publication date: May 4, 2023Applicant: Think Silicon Research and Technology Single Member S.A.Inventors: Georgios KERAMIDAS, Iakovos STAMOULIS
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Publication number: 20230082747Abstract: A system and method for improved compression of a graphical user interface (GUI) receives a first graphical user interface (GUI), the GUI including a GUI object. The method further includes compressing the first GUI, wherein the compressed first GUI is associated with a first compression ratio; generating a second GUI based on the GUI object of the first GUI, wherein the second GUI is different from the first GUI; compressing the second GUI, wherein the compressed second GUI is associated with a second compression ratio; generating an instruction which when executed configures a computer device to render the second GUI, in response to determining that the second compression ratio is higher than the first compression ratio; and generating an instruction which when executed configures the computer device to render the first GUI, in response to determining that the second compression ratio is lower than the first compression ratio.Type: ApplicationFiled: September 12, 2022Publication date: March 16, 2023Applicant: Think Silicon Research and Technology Single Member S.A.Inventors: Ioannis OIKONOMOU, Georgios KERAMIDAS
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Publication number: 20230078071Abstract: A system and method provides improved graphic rendering. The method includes detecting a gaze; determining an area of display corresponding to the gaze; generating a first instruction having a first quality of service (QoS) bit, for rendering a graphic on a first display portion which does not correspond to the detected gaze, the first QoS bit indicating a preference for a graphical processing unit (GPU) of a first plurality of GPUs; generating a second instruction having a second QoS bit, for rendering a second portion of the display corresponding to the gaze, the second QoS bit indicating a preference for execution on a GPU of a second plurality of GPUs; distributing the first instruction to the GPU of the second plurality of GPU in response to a first input; and distributing the second instruction to the GPU of the first plurality of GPU in response to a second input.Type: ApplicationFiled: October 31, 2022Publication date: March 16, 2023Applicant: Think Silicon Research and Technology Single Member S.A.Inventors: Georgios KERAMIDAS, Iakovos STAMOULIS, George SIDIROPOULOS
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Patent number: 11550389Abstract: A graphics rendering processor receives data related to a display and a user's gaze which is directed at the display. The user gaze may be detected based on inputs received from an optical sensor, such as a near-infrared sensor. The processor then renders different portions of the display based on the user gaze, such that an area where the user gaze is directed will receive higher rendering priority than an area at which the user gaze is not directed. In a processor with multiple cores which differ in precision, operation cost, etc. a controller may determine what portion of the display to render on which cores, based on the detected user gaze, content, or a combination thereof.Type: GrantFiled: September 3, 2021Date of Patent: January 10, 2023Assignee: Think Silicon Research and Technology Single Member S.A.Inventors: Georgios Keramidas, Iakovos Stamoulis, George Sidiropoulos