Abstract: A method and apparatus for forming electric connections between predetermined bonding pads of semiconductor electronic devices and respective electric contact leads formed on a frame holding the devices in a tidy arrangement is disclosed. The apparatus includes a supporting structure, a conveyor for advancing the frame along a longitudinal direction in a work plane on the supporting structure, a bonding head, and a high-precision X-Y table carrying the bonding head for accurately setting the bonding head in the work plane. The bonding apparatus further includes a carriage guided on the supporting structure for movement in a transverse direction to the longitudinal direction, the X-Y table being mounted on the carriage. The bonding head working range always spans a sufficiently large area for a single device, thereby enabling connections to be made even when the side-by-side devices are arranged in two or more rows.

Abstract: The invention relates to a programming method and device for detecting an error and inhibiting writing into a memory. The invention provides for the inclusion, in the standard programming method, of a checking step for interrupting the programming procedure and generating an error signal detecting the attempted overwriting of a "0" with a "1". The checking step of the inventive programming method provides for an initial comparison between the contents of a plurality of bits being programmed and a corresponding plurality of bits to be written in, the generation of an error signal upon detection of homolog pairs with a value of "one", and the interruption of the byte programming procedure to prevent a "1" from being written over a "0".

Abstract: An all-differential operational amplifier (20) has a first input (22) and a second input (24) and correspondingly has a first output (26) and a second output (28), fed back on its own input respectively through a first (34) and second (36) impedance which are generally resistive and have identical values. The first output is connected to the second input of the operational amplifier across a third impedance (32). A fourth impedance (30), equal in value to the third impedance, is connected in series to the first input and acts as input terminal of the converter. The resistive components of the impedance can be implemented as switched capacitors.

Abstract: A device for minimizing parasitic junction capacitances in an isolated collector vertical PNP transistor, having a terminal N connected to an epitaxial n layer, comprises a bootstrap circuit including an emitter follower vertical PNP transistor having its emitter and base respectively connected to the terminal of the epitaxial n layer and the collector of the isolated collector transistor; further, a bias resistance is connected between the emitter and one pole of a voltage supply to the emitter follower.

Abstract: An electronic comparator circuit having a high speed during switch phase and combining the advantages of bipolar technology with those of CMOS technology. The circuit consists of a differential stage input circuit having a differential pair of bipolar transistors forming its outputs. The output stage contains a pair of MOS transistors having gate electrodes in common. The pair of MOS transistors is connected on one side to the outputs of the input portion and on the other side to a positive supply pole via a current mirror circuit. The output contains another pair of MOS transistors with gate electrodes in common connected between the out puts of the input portion and ground. The drain electrode of the first pair of MOS transistors forms the output for the comparator.