Abstract: In a switched capacitor type digital-to-analog (D/A) converter, a group of n bits of the binary word are applied to n parallel branches of the D/A converter, respectively. In a given branch, the corresponding bit is applied to a control terminal of a corresponding switch associated with a corresponding switched capacitor. Depending on the logic level of the bit, the switched capacitor is charged to a reference voltage or remains discharged. Then, the switched capacitor of the given branch is coupled by a transfer switch in parallel with a summing capacitor to provide for charge redistribution. The capacitances of the switched capacitor and of the summing capacitor are equal. The time allocated for either discharging the switched capacitor or charge redistribution is made shorter than the time allocated for charging the capacitor. Charging/discharging the capacitor is accomplished via a common transistor.

Abstract: A sparse digital adaptive equalizer including forward and feedback Finite Impulse Response (FIR) filters exhibits improved Least Mean Square operation. A switch assigns one of several multipliers of each filter to any one of the tap locations of that filter. Each multiplier is initially assigned to a preselected tap location with a predetermined weighting coefficient. After completing successive time cycles having a duration equal to a given number of data sample periods, for each filter there is determined (a) a first group of coefficients associated with multipliers then assigned to non-zero value tap locations, and (b) a second group of coefficients associated with multipliers then assigned to zero valued locations. Multipliers associated with first group coefficients during a just-completed time cycle retain their tap locations during the next time cycle.

Abstract: A helical antenna system for receiving simultaneous signals with different polarizations, with the aid of helical feeders and without gain degradation. Two or more helical feeders are provided for each polarization direction.

Abstract: The disclosure is a device for mechanical assembly of a flexible cable in a cylindrical orifice, including a cable grip member slotted axially and carrying at least two helical threads on the outside and protuberances on the inside. The cylindrical orifice has a thread that engages the threads of the cable grip member. To fit the cable, the cable grip member is pushed axially into the cylindrical orifice, then the flexible cable is inserted axially in the cable grip member. Removal of the cable is achieved by unscrewing the cable grip member from the cylindrical orifice. The protuberances and the compression effect produced by the helical threads pulling on the thread in the cylindrical orifice when axial tension is applied to the cable assure efficient gripping of the cable.

Abstract: The programming of a broadcast receiver is selected from the display and the mapping of the required numbers is fully automatic. The user enters a code and the VCR decodes the entered code to determine the corresponding channel. The VCR then checks to determine if this channel is mapped. If not, the VCR prompts the user to identify which program one wishes to record. A picture on the TV, in a mixed mode, can be used for this, i.e., the TV program selected is shown on the background behind the text. The user uses keys on the remote control to scroll through the list of channels to find the program one wants to record. Once determined, the VCR will automatically map the correct three digit numbers for the program selected. In this way, the user need not know what the selection number represents.

Abstract: A system for providing security on an interactive television system. Two sets of interactive data, with time stamps, are separately sent to a remote location. At the remote location, the time stamps are checked against a remote clock, a time difference being noted for both sets of data. The two time differences are compared to determine if one set of data has been delayed as compared to the other. Non-delayed data can be used to update a game score for an interactive game. After the game is completed, the remote clock is compared to a central clock. the difference between the two clocks are compared to the time difference for non-delayed data to determine whether the entire aggregate of interactive data was delayed.

Abstract: In laser feedback systems of an optical memory the most suitable feedback gain value depends on the type of optical disks used. According to the invention a system and a method is provided which finds by way of an iteration a suitable maximum feedback gain value so that the feedback system does not oscillate. The method consists in starting with a low gain value for driving a laser diode, increasing the gain value by small amounts until an oscillation detecting unit detects that the laser feedback system is oscillating. Then the gain value is reset to the previous value or a little bit more. Then the laser feedback system is again in a non-oscillating area with a suitable maximum gain value. This iteration is performed by a system consisting mainly of a laser diode, a photodiode for detecting the reflected light, and an oscillation detecting unit which controls a gain controller. This gain controller sets the gain on a multiplier which drives the laser driver for the laser diode.

Abstract: A controller, which is normally used for controlling different modes is used for circuit protection. The suipply voltage and control signals from the switched mode power supply to the controller are modified when a short circuit occurs. In response thereto, the controller switches "off" a mode-control signal and the switched mode power supply operates in standby mode.

Abstract: The present invention relates to a method of processing a digital signal of dimension k, in a so-called secure communication system, such that the digital signal (y) at output cannot be deduced from the digital signal (x) at input, consisting in dispatching the digital signal (x) to a device effecting a one-way function.The method includes the following steps:the digital signal (x) at the input is dispatched to a circuit C (1, 2) which gives as output a digital signal (x") of dimension n acceptable to the one-way function;the signal (x") from the circuit C (1, 2) is dispatched to the circuit effecting the one-way function giving as output the digital signal (y).The invention applies in particular to so-called secure communication systems.

Abstract: A microwave polarizer particularly in a system for coupling energy between a waveguide and a transmission line. The polarizer reduces cross polarization by means of the probes being adjusted to an input impedance of less than 50 ohms, in particular to 20 ohms, by reducing the penetration depth of the probes. The smaller penetration depth also increases the distance between the two probes, which reduces cross polarization.

Abstract: A method of digitization of an intermediate frequency signal having a bandwidth that can change from one standard to another and of which one of the frequency limits of this band is substantially constant, wherein before converting the analog signal into a digital signal, the signals of the channels (S.sub.if.sup.N+1, S.sub.if.sup.N-1) adjacent to the frequency band of the signal to be digitized are eliminated in three stages: in a first stage, the signals (S.sub.if.sup.N+1) of channels adjacent to said substantially constant frequency limit are eliminated by filtering; in a second stage, the signal to be processed is transposed in frequency so that in the transposed signal the variable frequency limit of said band of the signal to be digitized has a substantially constant value; in a third stage, the signals of channels adjacent to the transposed signal are eliminated by filtering. The invention is applicable to the processing of digital IF video signals.

Abstract: The invention relates to a device for interfacing between at least two communications buses. The device includes a two-way interface for each of the communications buses, a circuit for comparison of messages received by the interfaces, and a circuit for resolving conflicts of priority between messages overlapping in time so that the conflict resolution circuit authorizes the transmission of the higher priority message through the interface or interfaces to the communications buses from which the higher priority message did not originate.

Abstract: A polarizing splitter device includes a double prism having an entry face for receiving a beam of unpolarized light, a polarizing splitter transmitting the polarized light in a first polarization direction, and reflecting the light polarized in a second polarization direction. The double prism also has a reflection face provided with a mirror receiving the light reflected by the polarizing splitter as well as an exit face for receiving and transmitting the light transmitted by the polarizing splitter and reflected by the mirror.

Abstract: An interactive television system where interactive information is inserted in the vertical blanking interval of a standard television signal or some other appropriate medium. The signal is received and decoded by a settop device which sends the decoder signal, via an infrared signal, to a handheld device. The system includes an interactive program authoring system, and programmer tables in the memory of the handheld device which store data for the various interactive events. This system allows a viewer to enter and exit events at any time without having to wait for information to be downloaded and without losing scores. Furthermore, this system allows many interactive programs to run concurrently over extended periods of time while maintaining cumulative scores in the handheld for each interactive program or series of programs.

Abstract: In a compression system including a quantizer for quantifying a matrix of coefficients according to a matrix of quantizing values, and which is responsive to rate buffer occupancy for providing quantizing scale factors to modify the quantizing matrix, significant channel capacity may be salvaged without significant loss of image quality by incorporating apparatus to limit the minimum values of quantizing scale factors that are applied to the quantizing matrix.

Abstract: A method is disclosed for optimizing the operation of a packet transport system generating a packet stream carrying a plurality of component signals, and includes the following steps. First the packet stream is partitioned into successive groups, each group containing a predetermined number of packet slots. A plurality of lists are maintained, one associated with each packet slot in a group. A packet stream is generated by placing data representing a component signal selected in response to entries in the list associated with that packet slot into the packet slot. The contents of the plurality of lists are updated based on a predetermined parameter.

Abstract: A method of selecting motion vectors in a motion estimation system involves calculating values of an evaluation function. Each evaluation function value corresponds to a block of pixels of a reference window with respect to a current block of pixels and the relative position of the blocks is described by a motion vector. The method also involves determining the smallest value of the evaluation function and comparing the norms of the vectors associated with the smallest value. The vector having the smallest norm is selected from the associated motion vectors.

Abstract: Due to low output voltage during flyback mode of start phase the secondary current cannot be fully discharged in time. The current buildup will eventually damage the output transistor if the current is not limited.In order to prevent the current build up during start phase, the storage time of the output transistor of the SMPS has to be reduced.During the startup phase a negative bias capacitor is not fully charged. Thereby the base of an output transistor is not biased sufficiently when the transistor is switched off. So the transistor could not operate safely if the collector voltage is higher than Vceo.It is the object to keep charges, which are stored on the capacitor during startup phase and to reduce discharging of the capacitor.According to this invention means are provided between the base and the emitter of the output transistor. It is preferred that said means are realised by a resistor and a diode, connected in series.

Abstract: The disclosure is an analog-to-digital converter of half-flash type providing for the multiplexing of two analog input signals and therefore requiring only one converter module. It includes a coarse comparator block used to determine the most significant bits of the converted signals and also determining the voltage range for two fine comparator blocks that determine the least significant bits of the converted signals, wherein each of the input signals is connected to a fine comparator block and said coarse comparator block compares alternatively the first and second input signals with a reference voltage. The analog-to-digital converter can be advantageously used for processing television signals.