Abstract: A vertical LED chip structure, a method of manufacturing the same, and a light-emitting device are provided. After an epitaxial structure is bonded to a substrate, the epitaxial structure is etched first to form a first mesa. After the first mesa is formed, the epitaxial structure is continuously etched at the first mesa until the epitaxial structure is etched through and a reflective layer is exposed, and a second mesa is formed. A protective layer is formed on a surface of the structure where the first mesa and the second mesa are formed. The protective layer covers the exposed reflective layer at the second mesa, protects the epitaxial structure and the reflective layer, and protects a side wall of the epitaxial structure and the reflective layer from being corroded by a processing solution after a back surface of the substrate is polished.

Abstract: A light emitting device includes an epitaxial structure and first and second electrodes on a side of the epitaxial structure. The epitaxial structure includes a first-type semiconductor layer, an active layer, and a second-type semiconductor layer. The active layer is disposed between the first-type semiconductor layer and the second-type semiconductor layer. The first electrode is disposed on the epitaxial structure to be electrically connected with the first-type semiconductor layer. The second electrode is disposed on the epitaxial structure to be electrically connected with the second-type semiconductor layer. The second electrode is in ohmic contact with a second-type window sublayer of the second-type semiconductor layer.

Abstract: A light-emitting diode and a display device are provided. The light-emitting diode includes an epitaxial structure, and the epitaxial structure has a light-emitting surface and a rear surface opposite to the light-emitting surface. The light-emitting surface includes a peripheral region and a middle region surrounded by the peripheral region, the peripheral region is covered with an insulating layer, and the area of the middle region accounts for 60% to 99% of the area of the light-emitting surface. The width of the insulating layer on the light-emitting surface is between 5 ?m and 20 ?m, so that it is possible to ensure a sufficient light output rate of the light-emitting diode, and the thickness of the insulating layer may be properly increased as well to enhance the protection for the sidewall of the light-emitting diode and prevent IR current leakage from affecting the performance of the device.

Abstract: A flip-chip light-emitting diode includes a first conductivity type semiconductor layer, a light-emitting layer, a second conductivity type semiconductor layer, a first transparent dielectric layer, a second transparent dielectric layer, and a distributed Bragg reflector (DBR) structure which are sequentially stacked. The first transparent dielectric layer has a thickness greater than ?/2n1, and the second transparent dielectric layer has a thickness of m?/4n2, wherein m is an odd number, ? is an emission wavelength of the light-emitting layer, n1 is a refractive index of the first transparent dielectric layer, and n2 is a refractive index of the second transparent dielectric layer and is greater than n1.

Abstract: An epitaxial wafer structure of light-emitting diode includes, from bottom to up, a substrate, an N-type GaN layer, a MQW light-emitting layer and a P-type GaN layer, in which, at least one InyGa1?yN/AlN composition layer (0<y?1) is inserted in the N-type GaN and at least one multi-layer AlN/InzGa1?zN composition layer (0<z?1) is inserted in the P-type GaN layer; and AlN part in the inserting layer increases barrier to form a blocking layer and the InyGa1?yN layer reduces barrier to form a carrier capture layer so as to generate two-dimensional electron gas of higher concentration and more-concentrated distribution in the N-type GaN layer and the P-type GaN layer, thereby improving current spreading capacity.

Abstract: A method of fabricating a light-emitting diode includes: proving a substrate; forming an N-type layer, a low-temperature AlxInyGa1?x?yN (0?x?1, 0?y?1, x and y cannot both be zero at the same time) layer, a multiple quantum-well active region, an AlzGa1?zN (0?z?1) electron blocking layer, an AlxInyGa1?x?yN (0?x?1, 0?y?1) separation layer and a P-type layer over the substrate in successive; before growth of the multiple quantum-well active region, growing a low-temperature AlxInyGa1?x?yN layer to form a “V”-shaped indentation or pit; after growth of the multiple quantum-well active region, growing a thin AlzGa1?zN electron blocking layer and then a separation layer under two-dimensional growth mode to form holes between the active region and the P-type layer to separate throughout dislocation within the V pit coverage range and contact with the P-type layer, thus eliminating current leakage and improving inverse current leakage capacity and anti-static capacity of the epitaxial wafer.

Abstract: A light-emitting diode includes at least an N-type layer, a light-emitting layer and a P-type layer, wherein the light-emitting layer forms a “V”-shaped indentation or pit during epitaxial process and the V pit is filled in with at least one type of metal nanoparticles to generate surface plasma coupling effect and to improve recombination probability of holes and electrons, thus improving internal quantum efficiency; further, a V pit is generated in the N-type layer during epitaxial process; surface plasma coupling effect is generated by filling metal nanoparticles in the V pit to increase light reflection, light extraction efficiency and external quantum efficiency, thereby improving light emitting efficiency of LED; and the V pit is formed directly by adjusting growth rate, thickness, temperature, pressure or doping during epitaxial process instead of etching, which causes no damage to the LED epitaxial layer, thus simplifying process and improving device stability.

Abstract: A LED fabrication method includes: providing a substrate; forming a low-temperature AlxGa1-xN (0?x?1) layer over the growth substrate; setting the growth pressure from high to low and temperature and rotation rate from low to high to realize change from three-dimensional growth to two-dimensional growth of the GaN structure layer before growth of the multiple quantum-well layer, in which, Si is doped at position approximate to the multiple quantum-well layer to form an undoped gradient GaN layer and an N-type gradient GaN layer; growing a multiple quantum-well layer, an AlxGa1-xN (0?x?1) layer and a P-type layer; and during later chip fabrication, dividing the epitaxial wafer over the etched N-type platform into chip grains and immersing them in chemical solutions for wet etching; and forming an inverted pyramid structure with rough side wall over the multiple quantum-well layer to improve light-emitting efficiency.