Patents Assigned to Tier-Logic, Inc.
  • Patent number: 7463059
    Abstract: A semiconductor device includes a plurality of circuit blocks; and a configuration circuit coupled to the plurality of circuit blocks to program the circuit blocks, the configuration circuit comprising a plurality of memory elements, the memory elements further comprising: a first set of memory elements to store a first instruction; and a second set of memory elements to store a second instruction; and a global control signal to select the first or second instruction in the configuration circuit to program the circuit blocks.
    Type: Grant
    Filed: March 10, 2008
    Date of Patent: December 9, 2008
    Assignee: Tier-Logic, Inc.
    Inventor: Raminda Udaya Madurawe