Patents Assigned to Tokyo Eectron Limited
  • Patent number: 8277560
    Abstract: A CVD apparatus cleaning method that efficiently removes by-product such as SiO2 or Si3N4 adhered to and deposited on surfaces of an inner wall, an electrode, and the like in a reaction chamber at a film forming step. In the cleaning method the discharged cleaning gas amount is very small, environmental influences such as global warming can be lessened, and cost can be reduced. A CVD apparatus supplying reactive gas into a reaction chamber and forming a deposited film on a surface of a base material provided in the reaction chamber includes an exhaust gas recycling path recycling an exhaust gas reaching the reaction chamber from downstream of a pump on an exhaust path for exhausting a gas from an inner part of the reaction chamber through the pump.
    Type: Grant
    Filed: March 19, 2003
    Date of Patent: October 2, 2012
    Assignees: National Institute of Advanced Industrial Science and Technology, Canon Anelva Corporation, Ulvac, Inc., Kanto Denka Kogyo Co., Ltd., Sanyo Electric Co., Ltd., Showa Denko K.K., Sony Corporation, Tokyo Eectron Limited, Hitachi Kokusai Electric Inc., Panasonic Corporation, Mitsubishi Denki Kabushiki Kaisha, Renesas Electronics Corporation
    Inventors: Katsuo Sakai, Seiji Okura, Masaji Sakamura, Kaoru Abe, Hitoshi Murata, Etsuo Wani, Kenji Kameda, Yuki Mitsui, Yutaka Ohira, Taisuke Yonemura, Akira Sekiya
  • Patent number: 7704893
    Abstract: The present invention relates to a semiconductor device comprising an insulation film consisting of a fluoridation carbon film that has been subjected to thermal history of 420° C. or lower. The feature of the present invention is that an amount of hydrogen atoms included in the fluoridation carbon film is 3 atomic % or less before the fluoridation carbon film is subjected to the thermal history.
    Type: Grant
    Filed: August 12, 2004
    Date of Patent: April 27, 2010
    Assignees: Tokyo Eectron Limited, Zeon Corporation
    Inventors: Yasuo Kobayashi, Kohei Kawamura, Tadahiro Ohmi, Akinobu Teramoto, Tatsuya Sugimoto, Toshiro Yamada, Kimiaki Tanaka
  • Publication number: 20060235558
    Abstract: A process system 1 comprises a process apparatus 10 which performs a predetermined process on a wafer W, a plurality of detection means which detect statuses in the process apparatus 10, an abnormality detection section 15 which detects an abnormality in detection information from the plurality of detection means, an alarm generation section 16 which generates an alarm when the abnormality detection section 15 detects an abnormality, an information storage section 17 which stores the detection information from the detection means in the process apparatus 10 and alarm information as a process history of the process apparatus 10, an alarm-related information acquisition section 18 which selectively acquires information relating to an alarm selected from the information storage section 17, and a display section 21 which displays alarm-related information acquired by the alarm-related information acquisition section 18.
    Type: Application
    Filed: March 29, 2005
    Publication date: October 19, 2006
    Applicant: TOKYO EECTRON LIMITED
    Inventor: Osamu Tanaka