Patents Assigned to Tokyo Electron Yamanashi Limited
  • Patent number: 6297064
    Abstract: When plasma-etching a silicon dioxide film with a CF-based gas, the emission intensities (Ia, Ib) of CF-based radicals and carbon monoxide are observed through spectroscopes (61, 62). First, first and second approximate expressions (Fa(x), Fb(x)) which approximate the characteristic curves of the emission intensities (Ia, Ib) within a specified period are obtained, and the ratio of the standard deviations of the emission intensities (Ia, Ib) to the values of the first and second approximate expressions (Fa(x), Fb(x)) is obtained as a correction coefficient &agr;. When the specified period has elapsed, first and second intermediate expressions (Ia/Fa(x), Ib/Fb(b)) are obtained, and a criterion expression ([Ia/Fa(x)]/{&agr;[Ib/Fb(x)−1]+1}, which expresses the ratio of the first intermediate expression to the second intermediate expression and is weight-corrected with the correction coefficient (&agr;), is obtained.
    Type: Grant
    Filed: August 3, 2000
    Date of Patent: October 2, 2001
    Assignees: Tokyo Electron Yamanashi Limited, Agency of Industrial Science and Technology
    Inventor: Chishio Koshimizu
  • Patent number: 6162323
    Abstract: The processing chamber of an etching apparatus is divided into a plasma generating space and a processing space by a grid electrode. A first feed gas is supplied from a gas source unit to the plasma generating space through a first flow control valve mechanism and a first gas supply line. A second feed gas is supplied from the gas source unit to the processing space through a second flow control valve mechanism and a second gas supply line. The interior of the processing chamber is evacuated by an exhaust pump through an exhaust line connected to the processing space. Each of the first and second flow control valve mechanisms has a plurality of valves whose opening degrees are separately controlled by a CPU.
    Type: Grant
    Filed: June 8, 1998
    Date of Patent: December 19, 2000
    Assignees: Tokyo Electron Yamanashi Limited, Japan Science and Technology Corporation
    Inventor: Chishio Koshimizu
  • Patent number: 6149760
    Abstract: An inductively coupled type dry etching apparatus has a spiral RF antenna disposed on the ceiling wall of a process chamber. A susceptor is arranged in the process chamber, for mounting a semiconductor wafer thereon. The ceiling wall has upper and lower layers with a dielectric matrix, and a conductive Faraday shield layer sandwiched therebetween. The Faraday shield layer has a plurality of slits radially arranged. The matrix of the upper and lower layers and the Faraday shield layer are set to have coefficients of thermal expansion close to each other, and/or the Faraday shield layer is set to have a very small thickness.
    Type: Grant
    Filed: October 15, 1998
    Date of Patent: November 21, 2000
    Assignees: Tokyo Electron Yamanashi Limited, Japan Science and Technology Corporation
    Inventor: Kiichi Hama
  • Patent number: 6110287
    Abstract: A plasma processing method in which a high-frequency power is supplied to a processing chamber in which an object to be processed is mounted, thereby producing a plasma in the processing chamber, and the object is processed in an atmosphere of the plasma, wherein the high-frequency power is subjected to modulation by a low-frequency power. In one embodiment a plasma is produced in a processing chamber by using an electric power with a direction of current changed with passing of time, and the object to be processed is processed in an atmosphere of the plasma, wherein a power having a basic frequency is subjected to frequency modulation with a frequency equal to n-times (n=an integer) the basic frequency. In a plasma processing apparatus of the invention, while a process gas is supplied to a processing chamber via a first gas introducing hole formed in an electrode, an object to be processed, which is held on an opposed electrode, is subjected to plasma processing.
    Type: Grant
    Filed: April 28, 1997
    Date of Patent: August 29, 2000
    Assignees: Tokyo Electron Limited, Tokyo Electron Yamanashi Limited
    Inventors: Izumi Arai, Yoshifumi Tahara, Hiroshi Nishikawa, Yoshinobu Mitano, Shunichi Iimuro, Kazuo Fukasawa, Yutaka Miura, Shozo Hosoda
  • Patent number: 6101970
    Abstract: An inductively coupled type dry etching apparatus has an RF antenna disposed on a dielectric wall forming the ceiling of a process chamber. The process chamber is divided into a plasma generating space and a processing space by the partition of an intermediate electrode. A susceptor is arranged in the processing space, for mounting a semiconductor wafer thereon. The partition has openings for the plasma generating space and the processing space to communicate with each other. The partition is formed of a plurality of conductive beams radially arranged. The conductive beams extend in directions perpendicular to the direction of an electric field generated by the RF antenna, and have warps to absorb thermal stress.
    Type: Grant
    Filed: September 29, 1998
    Date of Patent: August 15, 2000
    Assignees: Tokyo Electron Yamanashi Limited, Japan Science and Technology Corporation
    Inventor: Chishio Koshimizu
  • Patent number: 6096176
    Abstract: A target and a wafer are opposed to each other in a processing vessel in the form of a quartz tube whose internal pressure can be reduced. A low bias voltage is applied to the wafer while Helicon wave plasma of high density is generated between the target and the wafer by an antenna disposed on the circumference of the processing vessel. The wafer is positioned near and outside a lower boundary of a region of the plasma. Deposition seeds from the target are ionized in the plasma region and accelerated vertically to be incident on the wafer and are deposited first on the bottoms of the grooves in a surface of the wafer. In burying deposition seeds in grooves and holes of high aspect ratios which are formed in the surface of the wafer, the deposition seeds can be deposited first on the bottoms without occurrence of voids.
    Type: Grant
    Filed: July 24, 1995
    Date of Patent: August 1, 2000
    Assignees: Tokyo Electron Limited, Tokyo Electron Yamanashi Limited, Yasuhiro Horiike
    Inventors: Yasuhiro Horiike, Takayuki Fukasawa
  • Patent number: 6079357
    Abstract: An inductively coupled type dry etching apparatus has an RF antenna disposed on the ceiling wall of a process chamber. A susceptor is arranged in the process chamber, for mounting a semiconductor wafer thereon. The ceiling wall has a matrix of alumina ceramic, and heat generating elements of a salt of a transition metal oxide, which are dispersed in the matrix and capable of self-generating heat by an RF electric field.
    Type: Grant
    Filed: October 15, 1998
    Date of Patent: June 27, 2000
    Assignees: Tokyo Electron Yamanashi Limited, Japan Science and Technology Corporation
    Inventor: Kiichi Hama
  • Patent number: 6074518
    Abstract: A plasma processing apparatus comprises a chamber, and an upper electrode and a lower electrode, parallelly provided in the chamber to oppose each other at a predetermined interval, for defining a plasma generation region between the electrodes. An object to be processed is mounted on the lower electrode. RF powers are supplied to the electrodes, so that a plasma generates between the electrodes, thereby performing a plasma process with respect to the object to be processed. A cylindrical ground electrode is provided around the plasma generation region in the chamber, for enclosing the plasma in the plasma generation region, and has a plurality of through holes for passing a process gas.
    Type: Grant
    Filed: January 4, 1999
    Date of Patent: June 13, 2000
    Assignees: Tokyo Electron Limited, Tokyo Electron Yamanashi Limited
    Inventors: Kosuke Imafuku, Shosuke Endo, Kazuhiro Tahara, Hiroshi Tsuchiya, Masayuki Tomoyasu, Yukio Naito, Kazuya Nagaseki, Ryo Nonaka, Keizo Hirose, Yoshio Fukasawa, Akira Koshiishi, Isao Kobayashi
  • Patent number: 5980767
    Abstract: Disclosed herein is a method of detecting an end point of plasma process performed on an object, and a plasma process apparatus. The method includes the steps of detecting an emission spectrum over a wavelength region specific to C.sub.2 in the plasma, by optical detecting means, and determining the end point of the plasma process from the emission intensity of the emission spectrum detected by the optical detector. The apparatus has a process chamber, a pair of electrodes, a light-collecting device, an optical detector, and a determining device. The chamber has a monitor window. The electrodes are located in the process chamber. The first electrode is used to support the object. A high-frequency power is supplied between the electrodes to change a process gas into plasma. The light-collecting device collects the light from the plasma through the monitor window. The optical detector detects an emission spectrum from the light collected.
    Type: Grant
    Filed: July 24, 1997
    Date of Patent: November 9, 1999
    Assignees: Tokyo Electron Limited, Tokyo Electron Yamanashi Limited
    Inventors: Chishio Koshimizu, Kimihiro Higuchi
  • Patent number: 5958258
    Abstract: A susceptor on which a wafer is placed, and an upper electrode are arranged in the processing chamber of an etching apparatus to oppose each other. An optical transmission window is disposed in the side wall of the processing chamber. The upper electrode and the susceptor are supplied with RF powers from a second RF power supply and a first RF power supply, respectively, to excite a plasma in the processing chamber. Emission of the plasma is detected by an optical detector through the optical transmission window, and data is sampled. In a CPU, the sampling data is subjected to fitting based on the Weibull distribution function, thus obtaining an approximate equation, and furthermore the differential equation of the approximate equation is obtained. The virtual end point of etching is expected from the approximate equation and differential equation.
    Type: Grant
    Filed: June 17, 1998
    Date of Patent: September 28, 1999
    Assignee: Tokyo Electron Yamanashi Limited
    Inventors: Hiroyuki Ishihara, Kohei Kawamura
  • Patent number: 5804983
    Abstract: A probe apparatus comprising a table on which a semiconductor wafer is mounted, the wafer having a circuit connected to a plurality of pads, a probe card assembly positioned relative to a reference plane, and having a card body and groups of probes held by a card holder, a drive system for moving the table up and down to cause the pads to be contacted with probe tips, a test head for sending test signal to the circuit through probes and pads, which are contacted with one another, to test the electric property of the circuit, a sensor for detecting the probe tip profile or levels at plural points of the probe card assembly, a controller for calculating the tilting degree and direction of probe tip profile of probe groups on the basis of results thus detected to thereby send correction commands, and a tilt correction unit for supporting the card holder and adjusting a level of the card holder at the plural points, responsive to the command applied from the controller, to thereby make the probe tip profile of ea
    Type: Grant
    Filed: March 27, 1997
    Date of Patent: September 8, 1998
    Assignees: Tokyo Electron Limited, Tokyo Electron Yamanashi Limited
    Inventors: Hisashi Nakajima, Haruhiko Yoshioka
  • Patent number: 5779803
    Abstract: An apparatus for subjecting a semiconductor wafer having an uncovered marginal portion, from which a photoresist film is removed, to an anisotropic etching. The apparatus comprises a process chamber which can be set to a vacuum. Upper and lower electrodes opposite to each other are provided in the process chamber. An etching gas is made into plasma between these electrodes. An electrostatic chuck is arranged on the lower electrode. A wafer is mounted on the electrostatic chuck. A ring made of dielectric material, movable upward and downward, is arranged between the electrodes. A central portion of the ring is formed as a hood having a recessed shape corresponding to the marginal portion of the wafer. During the etching, the hood covers the marginal portion of the wafer under a plasma sheath, so as to be out of contact with the wafer, thereby preventing the marginal portion of the wafer from being etched.
    Type: Grant
    Filed: August 13, 1996
    Date of Patent: July 14, 1998
    Assignees: Tokyo Electron Limited, Tokyo Electron Yamanashi Limited
    Inventors: Yoichi Kurono, Shigeki Tozawa, Shozo Hosoda
  • Patent number: 5766498
    Abstract: A parallel-plate plasma etching apparatus includes a susceptor electrode and a shower electrode which are arranged in a process chamber. A semiconductor wafer is placed on the susceptor electrode. A shower region defined by a plurality of process gas supply holes is formed in the shower electrode. The shower electrode is cooled by a cooling block and causes an effective electrode portion of the shower electrode to have a temperature gradient such that a temperature at the central portion of the effective electrode portion is lower than a temperature at the peripheral portion of the effective electrode portion. The diameter of the shower region is selected to be smaller than the diameter of the wafer by 5 to 25% such that degradation of planar uniformity of a degree of etching anisotropy on the wafer caused by the temperature gradient of the effective electrode portion is compensated for.
    Type: Grant
    Filed: March 29, 1996
    Date of Patent: June 16, 1998
    Assignees: Hitachi, Ltd., Tokyo Electron Limited, Tokyo Electron Yamanashi Limited
    Inventors: Masayuki Kojima, Yoshikazu Ito, Kazushi Tomita, Shigeki Tozawa, Shunichi Iimuro, Masashi Arasawa, Eiichi Nishimura
  • Patent number: 5728253
    Abstract: Disclosed herein is a method of detecting an end point of plasma process performed on an object, and a plasma process apparatus. The method includes the steps of detecting an emission spectrum over a wavelength region specific to C.sub.2 in the plasma, by optical detecting means, and determining the end point of the plasma process from the emission intensity of the emission spectrum detected by the optical detector. The apparatus has a process chamber, a pair of electrodes, a light-collecting device, an optical detector, and a determining device. The chamber has a monitor window. The electrodes are located in the process chamber. The first electrode is used to support the object. A high-frequency power is supplied between the electrodes to change a process gas into plasma. The light-collecting device collects the light from the plasma through the monitor window. The optical detector detects an emission spectrum from the light collected.
    Type: Grant
    Filed: September 30, 1994
    Date of Patent: March 17, 1998
    Assignees: Tokyo Electron Limited, Tokyo Electron Yamanashi Limited
    Inventors: Susumu Saito, Kazuo Eguchi
  • Patent number: 5717294
    Abstract: A vacuum chamber contains a first electrode for supporting a wafer, and a second electrode opposing the first electrode. A supply system and an exhaustion system are connected to the vacuum chamber. The system supplies a reactive gas into the chamber, and the system exhaust the used gas from the chamber. A radio-frequency power supply is connected to the first electrode, for supplying power between the electrodes to generate an electric field E. An annular magnet assembly is provided around the chamber, for generating a magnetic field B which has a central plane intersecting with the electric field E. The magnet assembly has a plurality of magnet elements which have different magnetization axes in the central plane of the magnetic field. Electrons drift due to a force resulting from an outer product (E.times.B) of the electric field E and the magnetic field B.
    Type: Grant
    Filed: February 27, 1995
    Date of Patent: February 10, 1998
    Assignees: Kabushiki Kaisha Toshiba, Tokyo Electron Limited, Tokyo Electron Yamanashi Limited
    Inventors: Itsuko Sakai, Makoto Sekine, Keiji Horioka, Yukimasa Yoshida, Koichiro Inazawa, Masahiro Ogasawara, Yoshio Ishikawa, Kazuo Eguchi
  • Patent number: 5708222
    Abstract: There is provided an inspection apparatus comprises, a transportation unit for transporting the object of inspection to a position opposite to the contact portion, a sucking holder movable toward and away from the contact portion and adapted to hold the object of inspection by suction; and a pressure contact mechanism provided separately from the transportation unit and adapted to press the sucking holder, thereby pressing the object of inspection against the contact portion. Thus the tranportation mechanism is separated from the pressure contact mechanism, the transportation mechanism can be reduced in weight, and the pressure contact mechanism can ensure setting of appropriate pressing. The operation time can be shortened, moreover, since the object of inspection is kept attached to the contact portion by the transportation mechanism as it is pressed against the contact portion.
    Type: Grant
    Filed: July 31, 1995
    Date of Patent: January 13, 1998
    Assignees: Tokyo Electron Limited, Tokyo Electron Yamanashi Limited
    Inventors: Toshihiro Yonezawa, Tsuyoshi Argua, Kunihiro Furuya, Junichi Hagihara
  • Patent number: 5672977
    Abstract: The probe apparatus for a semiconductor wafer has a work table on which a wafer is placed. A printed wiring board having a high rigidity is situated above the work table. A support block is mounted on the printed wiring board so as to pierce through its opening. The support block has a recess which opposes to the work table, and a flexible membrane-like probe card is detachably mounted on the support block so as to cover the recess. The probe card has a main region in which contact elements to be brought into contact with electrode pads of the semiconductor wafer are arranged. A rigid rectangular frame is attached to the rear surface of the probe card so as to surround the main region, thus imparting a flatness to the probe card. A pusher is provided in the recess of the support block so as to be brought into contact with the rear side of the main region of the probe card. The pusher is swingably arranged on the lower end of the shaft vertically supported.
    Type: Grant
    Filed: August 11, 1995
    Date of Patent: September 30, 1997
    Assignees: Tokyo Electron Limited, Tokyo Electron Yamanashi Limited
    Inventor: Masayuki Yamada
  • Patent number: 5642056
    Abstract: A probe apparatus including a table on which a semiconductor wafer is mounted, for a wafer having a circuit connected to a plurality of pads. A probe card assembly is positioned relative to a reference plane, and has a card body and groups of probes held by a card holder. A drive system moves the table up and down to cause the pads to contact probe tips, and a test head sends test signals to the circuit through the probes and pads, which contact one another, to test the electric property of the circuit. In addition, a sensor detects the probe tip profile or levels at plural points of the probe card assembly, and a controller calculates the tilting degree and direction of probe tip profile of probe groups on the basis of the results thus detected to thereby send correction commands.
    Type: Grant
    Filed: December 22, 1994
    Date of Patent: June 24, 1997
    Assignees: Tokyo Electron Limited, Tokyo Electron Yamanashi Limited
    Inventors: Hisashi Nakajima, Haruhiko Yoshioka
  • Patent number: 5640101
    Abstract: A probe system tests the electrical characteristics of chips arranged in a matrix on a semiconductor wafer. An XYZ stage movable in the directions of three-dimensional axes is disposed under a probe card having probes to be brought into contact with the electrode pads of the chips. A wafer table rotatable within a horizontal plane is disposed on the XYZ stage. A first image pickup means for picking up the probe images is mounted on the XYZ stage. A second image pickup means for picking up a wafer image is disposed above the table. The second image pickup means is movable horizontally to and from a use position under the probe card. A target is supported and moved by a driving member mounted on the XYZ stage, for aligning the focal points and optical axes of the first and second image pickup means. The target is moved between forward and retreat positions within and outside the field of view of the first image pickup means.
    Type: Grant
    Filed: April 18, 1996
    Date of Patent: June 17, 1997
    Assignees: Tokyo Electron Limited, Tokyo Electron Yamanashi Limited
    Inventors: Motohiro Kuji, Haruhiko Yoshioka, Shinji Akaike, Shigeaki Takahashi
  • Patent number: 5640100
    Abstract: A probe apparatus for examining an electrical characteristic of IC chips formed on a semiconductor wafer has a work table provided in a casing and a probe card provided above the work table. The probe card is detachably attached to an insert ring supported by the casing. A card exchanging mechanism for automatically attaching and detaching the probe card to and from the insert ring is provided. The card exchanging mechanism has a tray for mounting the probe card and transferring the-probe card. The tray is changeable at an initial position outside the casing between a usable state where the tray is horizontally expanded and an unusable state where the tray is vertically folded. An opening/closing cover is provided to cover the tray in the unusable state.
    Type: Grant
    Filed: October 20, 1995
    Date of Patent: June 17, 1997
    Assignees: Tokyo Electron Limited, Tokyo Electron Yamanashi Limited
    Inventors: Kazumi Yamagata, Minoru Uchida