Patents Assigned to Tom Dang-hsing Yiu
  • Semiconductor device
    Patent number: 5895887
    Abstract: In order to reduce the chip size of a semiconductor device as well as to separate noises between at least two types of pads having different functions, power supply pins and ground pins are provided on opposite edges of a package with input address pins being arranged therebetween and output data pins being arranged outside the same. Control pins and a nonconnected excess pin are arranged in the center. This allows the package to omit wires and reduce chip size.
    Type: Grant
    Filed: July 21, 1997
    Date of Patent: April 20, 1999
    Assignees: Mega Chips Corporation, Tom Dang-hsing Yiu
    Inventors: Akira Takata, Tetsuo Hikawa, Takashi Sawada, Tom Dang-hsing Yiu, Ful-Long Ni
  • Semiconductor device
    Patent number: 5866940
    Abstract: In order to reduce the chip size of a semiconductor device as well as to separate noises between at least two types of pads having different functions, at least one Vcc and at least one Vss are provided on opposite edges of a package (101) so that output pins or I/O pins are arranged therebetween and input pins are arranged outside the same. Non-connected excess pins (NC) are arranged on upper and lower boundaries, for omitting wires and reducing the chip size.
    Type: Grant
    Filed: July 21, 1997
    Date of Patent: February 2, 1999
    Assignees: Mega Chips Corporation, Tom Dang-hsing Yiu
    Inventors: Akira Takata, Tetsuo Hikawa, Takashi Sawada, Tom Dang-hsing Yiu, Ful-Long Ni
  • Semiconductor device
    Patent number: 5847449
    Abstract: In order to reduce the chip size of a semiconductor device as well as to separate noises between at least two types of pads having different functions, at least one Vcc and at least one Vss are provided on opposite edges of a package (101) so that output pins or I/O pins are arranged therebetween and input pins are arranged outside the same. Non-connected excess pins (NC) are arranged on upper and lower boundaries, for omitting wires and reducing the chip size.
    Type: Grant
    Filed: July 21, 1997
    Date of Patent: December 8, 1998
    Assignees: Mega Chips Corporation, Tom Dang-hsing Yiu
    Inventors: Akira Takata, Tetsuo Hikawa, Takashi Sawada, Tom Dang-hsing Yiu, Ful-Long Ni
  • Semiconductor device
    Patent number: 5825083
    Abstract: In order to reduce the chip size of a semiconductor device as well as to separate noises between at least two types of pads having different functions, at least one Vcc and at least one Vss are provided on opposite edges of a package (101) so that output pins or I/O pins are arranged therebetween and input pins are arranged outside the same. Non-connected excess pins (NC) are arranged on upper and lower boundaries, for omitting wires and reducing the chip size.
    Type: Grant
    Filed: July 21, 1997
    Date of Patent: October 20, 1998
    Assignees: Mega Chips Corporation, Tom Dang-hsing Yiu
    Inventors: Akira Takata, Tetsuo Hikawa, Takashi Sawada, Tom Dang-hsing Yiu, Ful-Long Ni
  • Semiconductor device
    Patent number: 5700975
    Abstract: In order to reduce the chip size of a semiconductor device as well as to separate noises between at least two types of pads having different functions, at least one Vcc and at least one Vss are provided on opposite edges of a package (101) so that output pins or I/O pins are arranged therebetween and input pins are arranged outside the same. Non-connected excess pins (NC) are arranged on upper and lower boundaries, for omitting wires and reducing the chip size.
    Type: Grant
    Filed: March 28, 1995
    Date of Patent: December 23, 1997
    Assignees: Mega Chips Corporation, Tom Dang-hsing Yiu
    Inventors: Akira Takata, Tetsuo Hikawa, Takashi Sawada, Tom Dang-hsing Yiu, Ful-Long Ni
  • Architecture for accessing very high density memory device
    Patent number: 5563844
    Abstract: In order to improve area efficiency of a mask ROM, a head address is inputted from a common pad (204) only in an initial access, so that addresses are thereafter changed by an internal counter (212). Data output is carried out through the common pad (204). Wires are employed for address input and data output in common, thereby remarkably reducing the number of wires.
    Type: Grant
    Filed: March 28, 1995
    Date of Patent: October 8, 1996
    Assignees: Mega Chips Corporation, Tom Dang-hsing Yiu
    Inventors: Akira Takata, Tetsuo Hikawa, Takashi Sawada, Tom Dang-hsing Yiu, Ful-Long Ni