Patents Assigned to Topro Technology Inc.
  • Complementary metal oxide semiconductor structure for battery protection circuit and battery protection circuit having the same
    Patent number: 6822296
    Abstract: A complementary metal-oxide semiconductor (CMOS) structure for a battery protection circuit and a battery protection circuit therewith. A tri-well technique or a buried layer technique is used for such CMOS structure to allow the battery protection circuit therewith to operate at different low voltage levels. Thereby, low voltage process can be realized to effectively reduce the cost of the chip and simplify the design.
    Type: Grant
    Filed: April 24, 2003
    Date of Patent: November 23, 2004
    Assignee: TOPRO Technology, Inc.
    Inventor: Chi-Chang Wang
  • Adjustment circuit for voltage division
    Patent number: 6455952
    Abstract: An adjustable circuit for voltage division comprises a serial resistor Rn(n=1, 2 . . . n) symmetrically mapped, connected in series, and paired in parallel with a switch Sn or Sn′ apiece, wherein the switches Sn and Sn′ are oppositely operated, namely, when the former is turned “ON/OFF”, the latter is turned “OFF/ON” to thereby hold the current unchanged to obtain desired output voltage(s) by proper control of the switches and accordingly a valid portion of voltage-dividing resistor &Dgr;R′.
    Type: Grant
    Filed: March 14, 2002
    Date of Patent: September 24, 2002
    Assignee: Topro Technology Inc.
    Inventor: Chi-Chang Wang