Patents Assigned to Toshiba Micro-Computer Engineering Corp.
  • Read/write control circuit
    Patent number: 4697101
    Abstract: A semiconductor integrated circuit which has a CMOS inverter formed of p- and n-channel MOSFETs, and a D-type n-channel MOSFET coupled at the gate to the output terminal of the CMOS inverter, having one end coupled to a high voltage terminal and the other end coupled to the drain of the p-channel MOSFET.
    Type: Grant
    Filed: August 29, 1984
    Date of Patent: September 29, 1987
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Micro-Computer Engineering Corp., Tosbac Computer System Co., Ltd.
    Inventors: Hiroshi Iwahashi, Masamichi Asano, Masaki Momodomi, Hidenobu Minagawa, Kazuto Suzuki, Akira Narita
  • Logic circuit with MOSFETs arranged to reduce current flow
    Patent number: 4621207
    Abstract: A logic circuit, comprising a plurality of driver MOSFETs and one load MOSFET, produces an output signal responsive to input signals. The driver MOSFETs are each controlled by an input signal and the load MOSFET is controlled by one of input signals to conduct at opposite times to the driver MOSFET controlled by the same input signal. Therefore, a logic circuit with low power consumption and a small area is provided.
    Type: Grant
    Filed: August 24, 1984
    Date of Patent: November 4, 1986
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Micro-Computer Engineering Corp.
    Inventors: Kazuo Suganuma, Tsuneo Hamai