Abstract: Improved systems and methods for singulating a substrate into a plurality of integrated circuit devices are disclosed. One aspect of the invention corresponds to a fixture that holds the substrate during the dicing process. Another aspect of the invention pertains to a nozzle assembly that provides better fluid flow over the cutting blades. Another aspect of the invention corresponds to a nozzle adjustment assembly that helps position the nozzles relative to the blades. Another aspect of the invention corresponds to spacers that reduce the problem of imbalance caused by fluid retained therein. Yet another aspect pertains to the composition of the fluid, which is distributed by the nozzle assembly to the blades.
Abstract: Techniques for singulating a substrate into a plurality of component parts is disclosed. The singulation techniques include generating a jet stream in order to cut through large components so as to produce smaller components. The techniques are particularly suitable for singulating surface mount devices such as chip scale packages, ball grid arrays (BGA), flip chips, lead less packages (QFN) and the like. The techniques are also suitable for singulating photonic devices.
Type:
Grant
Filed:
August 30, 2004
Date of Patent:
December 26, 2006
Assignee:
Towa Intercon Technology, Inc.
Inventors:
Ross Popescu, Clarence Tamargo, Shan Jiang
Abstract: Techniques for singulating a substrate into a plurality of component parts is disclosed. The singulation techniques include generating a jet stream in order to cut through large components so as to produce smaller components. The techniques are particularly suitable for singulating surface mount devices such as chip scale packages, ball grid arrays (BGA), flip chips, lead less packages (QFN) and the like. The techniques are also suitable for singulating photonic devices.
Abstract: Techniques for singulating a substrate into a plurality of component parts is disclosed. The singulation techniques include generating a jet stream in order to cut through large components so as to produce smaller components. The techniques are particularly suitable for singulating surface mount devices such as chip scale packages, ball grid arrays (BGA), flip chips, lead less packages (QFN) and the like. The techniques are also suitable for singulating photonic devices.
Type:
Application
Filed:
August 30, 2004
Publication date:
June 16, 2005
Applicant:
Towa Intercon Technology, Inc.
Inventors:
Ross Popescu, Clarence Tamargo, Shan Jiang