Patents Assigned to Townsend & Townsend
  • Patent number: 5713005
    Abstract: A method and apparatus for pipelining data is used in a synchronous integrated memory circuit in which a read cycle is initiated by a first clock received on a clock input. The data associated with the read cycle propagates asynchronously through the memory to produce data which is then input to the pipeline circuit. The apparatus includes steering circuitry with precise timing for steering the data produced in the read cycle into an asserted one of several branches of a register. Selection circuitry is used to select for output the data which has been stored in the asserted branch upon receipt of a subsequent clock. The subsequent clock is one which occurs a programmable number of clocks after the first clock.
    Type: Grant
    Filed: February 10, 1995
    Date of Patent: January 27, 1998
    Assignee: Townsend and Townsend and Crew LLP
    Inventor: Robert J. Proebsting
  • Patent number: 5689462
    Abstract: A memory circuit with programmable memory array organization and number of data output terminals, capable of connecting unused output buffers in parallel in organizations requiring fewer output terminals than the maximum possible. Parallel connection of output buffers improves output transient performance and employs otherwise dfsabled output buffers to reduce waste of silicon area.
    Type: Grant
    Filed: December 22, 1995
    Date of Patent: November 18, 1997
    Assignee: Townsend and Townsend and Crew, LLP
    Inventor: Robert J. Proebsting
  • Patent number: 5572471
    Abstract: A redundancy scheme for memory circuits that eliminates the need for physical disconnection or logical deselection of defective elements. The invention does not require disabling a defective element and allows it to operate and generate bad data. The circuit is designed such that the redundant element is able to override the defective element. Various approaches to row and column redundancy based on this principal are disclosed for memory circuit such as dynamic and static random access memories.
    Type: Grant
    Filed: August 17, 1995
    Date of Patent: November 5, 1996
    Assignee: Townsend and Townsend Khourie and Crew
    Inventor: Robert J. Proebsting
  • Patent number: 5546338
    Abstract: A method and a circuit for fast equilibration of complementary data lines in memory circuit following a write cycle. The circuit of the present invention separately controls the on/off timing of pull-up and pull-down transistors coupled to the data lines to obtain faster equilibration. In one embodiment incorporating an equilibration transistor between the data lines, the pull-up transistor coupled to the high data line is momentarily turned off after a write cycle, to allow the voltage on the high data line to drop all the way down to the voltage on the recovering low data line to reduce equilibration delay.
    Type: Grant
    Filed: May 9, 1995
    Date of Patent: August 13, 1996
    Assignee: Townsend and Townsend Khourie and Crew
    Inventor: Robert J. Proebsting
  • Patent number: 5495445
    Abstract: A redundancy scheme for memory circuits that eliminates the need for physical disconnection or logical deselection of defective elements. The invention does not require disabling a defective element and allows it to operate and generate bad data. The circuit is designed such that the redundant element is able to override the defective element. Various approaches to row and column redundancy based on this principal are disclosed for memory circuit such as dynamic and static random access memories.
    Type: Grant
    Filed: May 31, 1994
    Date of Patent: February 27, 1996
    Assignee: Townsend and Townsend and Crew
    Inventor: Robert J. Proebsting
  • Patent number: 5453951
    Abstract: A method and a circuit for fast equilibration of complementary data lines in memory circuit following a write cycle. The circuit of the present invention separately controls the on/off timing of pull-up and pull-down transistors coupled to the data lines to obtain faster equilibration. In one embodiment incorporating an equilibration transistor between the data lines, the pull-up transistor coupled to the high data line is momentarily turned off after a write cycle, to allow the voltage on the high data line to drop all the way down to the voltage on the recovering low data line to reduce equilibration delay.
    Type: Grant
    Filed: August 26, 1994
    Date of Patent: September 26, 1995
    Assignee: Townsend and Townsend Khourie and Crew
    Inventor: Robert J. Proebsting
  • Patent number: 4145176
    Abstract: A method and apparatus for forming cured polyethylene insulation about high voltage cables by applying uncured polyethylene around a core of the cable. The polyethylene is heated, cured and then cooled to room temperature in a pressurized nitrogen gas atmosphere. In one form the molding apparatus comprises first and second mold forms which define a cavity and which include means for heating the mold halves to the polyethylene curing temperature. Means is also provided to introduce the pressurized nitrogen into the cavity and for subjecting cable portions that extend beyond the mold to pressurized nitrogen until such cable portions are sufficiently cooled to prevent their deformation under pressure, to prevent the oxidation of polyethylene and/or to prevent the formation of voids or enclosures.
    Type: Grant
    Filed: December 22, 1977
    Date of Patent: March 20, 1979
    Assignee: Townsend & Townsend
    Inventor: Arthur L. Nelson
  • Patent number: 4091062
    Abstract: A method and apparatus for forming cured polyethylene insulation about high voltage cables by applying uncured polyethylene around a core of the cable. The polyethylene is heated, cured and then cooled to room temperature in a pressurized nitrogen gas atmosphere. In one form the molding apparatus comprises first and second mold forms which define a cavity and which include means for heating the mold halves to the polyethylene curing temperature. Means is also provided to introduce the pressurized nitrogen into the cavity and for subjecting cable portions that extend beyond the mold to pressurized nitrogen until such cable portions are sufficiently cooled to prevent their deformation under pressure, to prevent the oxidation of polyethylene and/or to prevent the formation of voids or enclosures.
    Type: Grant
    Filed: January 15, 1975
    Date of Patent: May 23, 1978
    Assignee: Townsend & Townsend, trustee
    Inventor: Arthur L. Nelson
  • Patent number: 3970735
    Abstract: A method for making splices in high voltage electrical cable and particularly for replacing relatively short sections of previously removed, original insulation. Ends of the original insulation adjoining the section are tapered and fresh insulating material is placed over the section and heated to fluidize it. Pressure is applied to intimately combine the original cable insulation and the newly added splice insulation to thereby effect an interfacing of the original and newly added insulating material. The new insulating material is placed inside the cavity of a mold which includes small apertures communicating the cavity with the exterior and being spaced over the length of the cavity. The fresh insulating material is pressurized by forcing additional material into the cavity to thereby vent entrapped air through the apertures to the exterior. Some of the apertures are selectively opened and closed to effect the venting while propagating the insulating material and the applied pressure throughout the cavity.
    Type: Grant
    Filed: January 31, 1975
    Date of Patent: July 20, 1976
    Assignee: Townsend and Townsend
    Inventor: Arthur L. Nelson
  • Patent number: 3970488
    Abstract: A molded cable splice is formed by wrapping strip-formed semiconducting and insulative thermosetting molding compounds about a layer of semiconducting tape covering a connector and exposed central conductors of a pair of cable ends joined by the connector, and bonding the insulative molding compound to the cable insulation layer in a heated mold having opposing end clamp portions each with an inner surface of a predetermined radius and length. The radius is selected in accordance with the formula ##EQU1## , WHERE R IS THE RADIUS OF THE CABLES TO BE JOINED AND X is a numerical quantity called the cable clamp factor. For cables having an ethylene propylene rubber insulation layer, X lies in the range from about 0.20 to about 0.50; for cables with a cross-linked polyethylene insulation layer, X is partially dependent on insulation thickness W and lies between a lower range of from about 0.50 to about 0.76 for W = 0.175 inch and an upper range of from about 0.87 to about 1.00 for W = 0.900 inch.
    Type: Grant
    Filed: March 7, 1975
    Date of Patent: July 20, 1976
    Assignee: Townsend and Townsend
    Inventor: Arthur L. Nelson