Abstract: A liquid crystal display (LCD) device is provided. The LCD device includes a LCD panel, which further includes a plurality of scan lines, a gate driving circuit, a clock circuit. The clock circuit includes a clock generator and an adjusting circuit. The clock generator generates a clock signal having a first high voltage level and a first low voltage level. The adjusting circuit, coupled to the clock generator, receives the clock signal and generates an adjusted clock signal having the same period as the clock signal. The adjusted clock signal has a second high voltage level and a second low voltage level. The gate driving circuit, coupled to the clock circuit, receives the adjusted clock signal as a gate driving signal in order to drive the scan lines.

Abstract: A conductive layer, a metal layer and a doped layer are sequentially formed on a glass substrate. A CMOS circuit region, a transistor region, a reflective region, a transmission region and a capacitor region are defined. Next, a polysilicon layer and an insulating layer are formed to serve as a source/drain region, a channel region and a gate insulating layer. Then, a resin layer with a rough surface is formed. Next, a metal layer is formed to serve as a gate structure and a reflective electrode. Then, an ion implanting process is performed to form the source/drain structure of a PMOS. Then, a passivation layer is formed to define a transmission region. Finally, the metal layer and the doped layer are removed to expose the conductive layer.

Abstract: A level shifter, with body-biased circuits, is provided for applying in a thin film transistor liquid crystal display (TFT-LCD). The body-biased circuits are configured to bias the bodies of the input terminal transistors of the level shifter so that the threshold voltages of the input terminal transistors are adjustable. This level shifter is capable of operating at a high frequency with low power consumption while a low-level signal is inputting.