Patents Assigned to Transitive Limited
  • Publication number: 20180218561
    Abstract: An automated ticket vending system comprises multiple individual ticket vending machines in a shared physical location, a control system, and a communications facility for supporting communications between the individual ticket vending machines and the control system. Each ticket vending machine is configured to acquire data relating to the current level of usage of that ticket vending machine, and to transmit the acquired usage data to the control system. The control system is configured to receive and analyse the usage data from the multiple ticket vending machines, and responsive to such analysis of the usage data, transmit control instructions to the multiple individual ticket vending machines specifying appropriate actions to address the current level of usage of the multiple individual ticket vending machines within the automated ticket vending system as a whole. Each ticket vending machine is configured to perform the actions specified in the control instructions received from the control system.
    Type: Application
    Filed: July 26, 2016
    Publication date: August 2, 2018
    Applicant: Parkeon Transit Limited
    Inventors: Philip Oldroyd, James Dickinson
  • Publication number: 20100030975
    Abstract: Method and apparatus for handling page protection faults in combination particularly with the dynamic conversion of binary code executable by a one computing platform into binary code executed instead by another computing platform. In one exemplary aspect, a page protection fault handling unit (196) is used to detect memory accesses; to check page protection information relevant to the detected access by examining the contents of a page descriptor store; and to selectively allow the access or pass on page protection fault information in accordance with the page protection information.
    Type: Application
    Filed: November 11, 2008
    Publication date: February 4, 2010
    Applicant: Transitive Limited
    Inventors: Simon Murray, Geraint M. North
  • Publication number: 20090210649
    Abstract: Disclosed are a method and apparatus for protecting memory consistency in a multiprocessor computing system, relating to program code conversion such as dynamic binary translation. The exemplary multiprocessor computing system provides memory and multiple processors, and a set of controller/translator units TX1, TX2, TX3 arranged to convert respective application programs into program threads T1, T2, etc., which are executed by the processors. Each controller/translator unit sets a first mode where a single thread T1 executes on a single processor P1, orders a second mode for two or more threads T1, T2 that are forced to execute one at a time on a single processor P2 such as by setting affinity with that processor, and orders a third mode to selectively apply active memory consistency protection in relation to accesses to explicit or implicit shared memory while allowing the multiple threads T1, T2, T3, T4 to execute on the multiple processors.
    Type: Application
    Filed: February 11, 2009
    Publication date: August 20, 2009
    Applicant: Transitive Limited
    Inventors: Kit M. Wan, Gisle Dankel
  • Patent number: 7543284
    Abstract: An improved method and apparatus for performing program code conversion is provided and, more particularly, for generating improved intermediate representations for use in program code conversion. During program code conversion, a partial dead code elimination optimization technique is implemented to identify partially dead register definitions within a block of program code being translated. The partial dead code elimination is an optimization to the intermediate representation in the form of code motion for blocks of program code ending in non-computed branches or computed jumps, where target code for all dead child nodes of a partially dead register definition is prevented from being generated and target code for partially dead child nodes of a partially dead register definition is delayed from being generated until after target code is generated for all fully live child nodes for the partially dead register definition.
    Type: Grant
    Filed: December 30, 2003
    Date of Patent: June 2, 2009
    Assignee: Transitive Limited
    Inventors: Ian Graham Bolton, David Ung
  • Publication number: 20080263342
    Abstract: Described is method and apparatus for handling exception signals in combination particularly with the dynamic conversion of binary code executable by a one computing platform into binary code executed instead by another computing platform. An exception handling unit selectively handles some exception signals with respect to a target state and handles others with respect to a subject state derived from the target state. Signal handling sub-units are arranged to process the exception signal with respect to the target state and output a request either to return to execution or to pass on the exception signal. A delivery path selection unit is arranged to determine a delivery path of the exception signal to a selected group of the plurality of signal handling sub-units. A signal control unit is arranged to deliver the exception signal in turn to each of the selected group of signal handling sub-units.
    Type: Application
    Filed: June 4, 2007
    Publication date: October 23, 2008
    Applicant: Transitive Limited
    Inventors: Paul Thomas Knowles, Kit Man Wan
  • Patent number: 7434209
    Abstract: A native binding technique is provided for inserting calls to native functions during translation of subject code to target code, such that function calls in the subject program to subject code functions are replaced in target code with calls to native equivalents of the same functions. Parameters of native function calls are transformed from target code representations to be consistent with native code representations, native code calling conventions, and native function prototypes.
    Type: Grant
    Filed: December 29, 2003
    Date of Patent: October 7, 2008
    Assignee: Transitive Limited
    Inventors: Alex Brown, Geraint North, Frank Thomas Weigel, Gareth Anthony Knight
  • Publication number: 20080244241
    Abstract: A computing system capable of handling floating point operations during program code conversion is described, comprising a processor including a floating point unit and an integer unit. The computing system further comprises a translator unit arranged to receive subject code instructions including at least one instruction relating to a floating point operation and in response to generate corresponding target code for execution on said processor. To handle floating point operations a floating point status unit and a floating point control unit are provided within the translator. These units are cause the translator unit to generate either: target code for performing the floating point operations directly on the floating point unit; or target code for performing the floating point operations indirectly, for example using a combination of the integer unit and the floating point unit. In this way the efficiency of the computing system is improved.
    Type: Application
    Filed: February 28, 2008
    Publication date: October 2, 2008
    Applicant: Transitive Limited
    Inventors: Gavin Barraclough, James R. Mulcahy, David J. Rigby
  • Patent number: 7426722
    Abstract: A method of dynamic real time translation of first program code written for a first programmable machine into second program code (target code) for running on a second programmable machine employing run time generation of an intermediate representation of the first program code. Upon first encountering a given portion of program code, only the target code necessary to execute that portion of program code under a prevailing set of entry conditions is initially generated and stored. When the same portion of program code is again encountered, a determination is made as to whether intermediate representation corresponding to a second subsequent set of conditions has been generated. If not, the target code necessary to execute the same portion of program code under that second set of conditions is generated.
    Type: Grant
    Filed: April 6, 2001
    Date of Patent: September 16, 2008
    Assignee: Transitive Limited
    Inventors: Jason Souloglou, Alasdair Rawsthorne
  • Patent number: 7421686
    Abstract: A method of dynamic real time translation of first program code written for a first programmable machine into second program code (target code) for running on a second programmable machine, the method employing run time generation of an intermediate representation of the first program code. Upon first encountering a given portion of program code, only the target code necessary to execute that portion of program code under a prevailing set of entry conditions is initially generated and stored. When the same portion of program code is again encountered, a determination is made as to whether intermediate representation corresponding to a second subsequent set of conditions has been generated. If not, the target code necessary to execute the same portion of program code under that second set of conditions is generated.
    Type: Grant
    Filed: June 6, 2002
    Date of Patent: September 2, 2008
    Assignee: Transitive Limited
    Inventors: Jason Souloglou, Alasdair Rawsthorne
  • Publication number: 20080209175
    Abstract: A target computing system 10 is adapted to support a register window architecture, particularly for use when converting non-native subject code 17 instead into target code 21 executed by a target processor 13. A subject register stack data structure (an “SR stack”) 400 in memory has a plurality of frames 410 each containing a set of entries 401 corresponding to a subset of subject registers 502 of one register window 510 in a subject processor 3. The SR stack 400 is accessed by the target code 21 executing on the target processor 13. The SR stack 400 stores a large plurality of such frames 410 and thereby avoids overhead such as modelling automatic spill and fill operations from the windowed register file of the subject architecture. In one embodiment, a target computing system 10 having sixteen general purpose working registers is adapted to support a register window architecture reliant upon a register file containing tens or hundreds of subject registers 502.
    Type: Application
    Filed: September 27, 2007
    Publication date: August 28, 2008
    Applicant: Transitive Limited
    Inventor: Alexander B. Brown
  • Patent number: 7409680
    Abstract: A method of dynamic real time translation of first program code written for a first programmable machine into second program code (target code) for running on a second programmable machine employing run time generation of an intermediate representation of the first program code. Upon first encountering a given portion of program code, only the target code necessary to execute that portion of program code under a prevailing set of entry conditions is initially generated and stored. When the same portion of program code is again encountered, a determination is made as to whether intermediate representation corresponding to a second subsequent set of conditions has been generated. If not, the target code necessary to execute the same portion of program code under that second set of conditions is generated.
    Type: Grant
    Filed: April 6, 2001
    Date of Patent: August 5, 2008
    Assignee: Transitive Limited
    Inventors: Jason Souloglou, Alasdair Rawsthorne
  • Patent number: 7409681
    Abstract: An execution apparatus (10) such as a user PC identifies that translation of generic code representation is required (e.g. Java bytecode included or referenced as part of a web page downloaded from a content provider (20)), and requests a translation of the generic code representation from a remote translation apparatus (30), i.e. a translation server. A translated native code version of the generic code representation specific to a particular execution environment (10) is identified and sent from the translation apparatus (30) immediately ready for native execution on the execution apparatus (10) at full native speed. This avoids perceived slow start-up and unresponsiveness associated with interpretation or compilation of generic code representation at the execution apparatus (10).
    Type: Grant
    Filed: August 28, 2002
    Date of Patent: August 5, 2008
    Assignee: Transitive Limited
    Inventors: John Graham, Alasdair Rawsthorne, Jason Souloglou
  • Publication number: 20080140971
    Abstract: A method and apparatus to protect memory consistency in a multiprocessor computing system are described, in particular relating to program code conversion such as dynamic binary translation. The exemplary system provides a memory, processors and a controller/translator unit (CTU) arranged to convert subject code into at least first and second target code portions executable on the processors. The CTU comprises an address space allocation unit to provide virtual address space regions and direct the target code portions to access the memory therethough; a shared memory detection unit to detect a request to access a shared memory area, accessible by both target code portions, and to identify at least one group of instructions in the first target code portion which access the shared memory area; and a memory protection unit to selectively apply memory consistency protection in relation to accesses to the shared memory area by the identified group of instructions.
    Type: Application
    Filed: November 19, 2007
    Publication date: June 12, 2008
    Applicant: Transitive Limited
    Inventors: Gisle Dankel, Geraint M. North, Miles P. Howson, Gavin Barraclough
  • Publication number: 20080092151
    Abstract: A technique is provided for handling dynamically linked subject function calls arranged pass subject control flow to an intermediate control structure such as a procedure linkage table, then to subject linker code for modifying link information associated with the subject function calls during translation of subject code into target code in a dynamic binary translator. The subject code for execution on a subject processor is received by a translator, and corresponding target code for execution on the target processor is generated. The translator is arranged to build a function linkage table containing an entry giving the location of each function called by the subject code, so that code can be generated by the translator in which subject function calls are associated with code for performing the function, without generating target code corresponding to the intermediate control structure.
    Type: Application
    Filed: October 2, 2007
    Publication date: April 17, 2008
    Applicant: Transitive Limited
    Inventor: Alexander Brown
  • Patent number: 7356810
    Abstract: A method for generating an intermediate representation of computer program code written for running on a programmable machine comprises: (i) generating a plurality of register objects for holding variable values to be generated by the program code; and (ii) generating a plurality of expression objects representing fixed values and/or relationships between said fixed values and said variable values according to said program code; said objects being organized into a branched tree-like network having all register objects at the lowest basic root or tree-trunk level of the network with no register object feeding into any other register object.
    Type: Grant
    Filed: June 6, 2002
    Date of Patent: April 8, 2008
    Assignee: Transitive Limited
    Inventors: Jason Souloglou, Alasdair Rawsthorne
  • Publication number: 20080082971
    Abstract: A technique is provided for administering references to a subject process filesystem during translation of subject code into target code in a dynamic binary translator. The subject code for execution on a subject processor is received by a translator, and corresponding target code for execution on the target processor is generated. The translator is arranged to establish, populate and maintain a process data structure, so that code can be generated by the translator in which subject references to the subject process filesystem are handled effectively.
    Type: Application
    Filed: September 28, 2007
    Publication date: April 3, 2008
    Applicant: Transitive Limited
    Inventors: James Walker, Ryan Cocks
  • Patent number: 7353163
    Abstract: A method of handling exceptions for use in an emulator (20) performing program code conversion. Registers (X) of a subject machine (11) being emulated (20) are represented by a pair of abstract registers (XA,XB) on the target machine (31), suitably using memory locations of the target machine and/or any available target registers. One of the pair (e.g., Reg XA) holds a definitive value at entry into a section (100) of subject code (10) while the other (e.g., Reg XB) holds a speculative value which is updated during translation and execution of that section of code. Exceptions are handled by recovering the conditions of the virtual subject machine (11) upon entry into the section of subject code (100) using the definitive version of each abstract register (i.e., Reg XA).
    Type: Grant
    Filed: April 6, 2001
    Date of Patent: April 1, 2008
    Assignee: Transitive Limited
    Inventors: Alasdair Rawsthorne, John H. Sandham, Jason Souloglou
  • Patent number: 7346900
    Abstract: A method of dynamic real time translation of first program code written for a first programmable machine into second program code (target code) for running on a second programmable machine employing run time generation of an intermediate representation of the first program code. The intermediate representation is generated to include a combination of register objects and expression objects. Register objects represent abstract registers that provide a representation of the state of the first programmable machine based on expected effects of the instructions within the first program code, while expression objects represent elements, such as operations or sub-operations, of the instructions in the first program code. In the intermediate representation, a branched tree-like network is formed in which each register object serves as a basic root of the network and references expression objects to which they relate either directly or indirectly through references from other expression objects.
    Type: Grant
    Filed: June 6, 2002
    Date of Patent: March 18, 2008
    Assignee: Transitive Limited
    Inventors: Jason Souloglou, Alasdair Rawsthorne
  • Patent number: 7328431
    Abstract: A method of dynamic real time translation of first program code written for a first programmable machine into second program code (target code) for running on a second programmable machine employing run time generation of an intermediate representation of the first program code. Upon first encountering a given portion of program code, only the target code necessary to execute that portion of program code under a prevailing set of entry conditions is initially generated and stored. When the same portion of program code is again encountered, a determination is made as to whether intermediate representation corresponding to a second subsequent set of conditions has been generated. If not, the target code necessary to execute the same portion of program code under that second set of conditions is generated.
    Type: Grant
    Filed: June 6, 2002
    Date of Patent: February 5, 2008
    Assignee: Transitive Limited
    Inventors: Jason Souloglou, Alasdair Rawsthorne
  • Publication number: 20080005724
    Abstract: A target computing system performs program code conversion from subject code, executable by a subject computing architecture, into target code executable by the target computing system, and then executes the target code. The target system handles exceptions during binding to native code. Native code binding executes a portion of native code in place of translating a portion of the subject code into the target code. Upon an exception during execution of the portion of native code, the target system saves a target state representing a current point of execution for the portion of native code, and creates a subject state representing an emulated point of execution in the subject architecture. A subject exception handler handles the exception with reference to the subject state. Upon resuming execution from the exception using the subject state, the saved target state is restored to resume execution in the section of portion of native code.
    Type: Application
    Filed: June 19, 2007
    Publication date: January 3, 2008
    Applicant: Transitive Limited
    Inventors: Gavin Barraclough, Kit Wan, Abdul Hummaida