Patents Assigned to Translucent Inc.
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Patent number: 8553741Abstract: The invention includes a single chip having multiple different devices integrated thereon for a common purpose. The chip includes a substrate having a peripheral area, a mid-chip area, and a central area. A plurality of FETs are formed in the peripheral area with each FET having a layer of single crystal rare earth material in at least one of a conductive channel, a gate insulator, or a gate stack. A plurality of photonic devices including light emitting diodes or vertical cavity surface emitting lasers are formed in the mid-chip area with each photonic device having an active layer of single crystal rare earth material. A plurality of photo detectors are formed in the central area.Type: GrantFiled: November 12, 2012Date of Patent: October 8, 2013Assignee: Translucent Inc.Inventor: Michael Lebby
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Publication number: 20120012166Abstract: The present invention relates to semiconductor devices suitable for electronic, optoelectronic and energy conversion applications. In a particular form, the present invention relates to the fabrication of a thin film solar cells and thin film transistors through the advantageous combination of semiconductors, insulators, rare-earth based compounds and amorphous and/or ceramic and/or glass substrates. Example embodiments of crystalline or polycrystalline thin film semiconductor-on-glass formation using rare-earth based material as impurity barrier layer(s) are disclosed. In particular, thin film silicon-on-glass substrate is disclosed as the alternate embodiment, with impurity barrier designed to inhibit transport of deleterious alkali species from the glass into the semiconductor thin film.Type: ApplicationFiled: September 13, 2011Publication date: January 19, 2012Applicant: TRANSLUCENT INC.Inventor: Petar Atanackovic
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Publication number: 20120001171Abstract: The present invention discloses structures to increase carrier mobility using engineered substrate technologies for a solid state device. Structures employing rare-earth compounds enable heteroepitaxy of different semiconductor materials of different orientations.Type: ApplicationFiled: September 14, 2011Publication date: January 5, 2012Applicant: TRANSLUCENT INC.Inventor: Petar B. Atanackovic
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Patent number: 8071872Abstract: The present invention relates to semiconductor devices suitable for electronic, optoelectronic and energy conversion applications. In a particular form, the present invention relates to the fabrication of a thin film solar cells and thin film transistors through the advantageous combination of semiconductors, insulators, rare-earth based compounds and amorphous and/or ceramic and/or glass substrates. Crystalline or polycrystalline thin film semiconductor-on-glass formation using alkali ion impurity barrier layer(s) are disclosed. Example embodiment of crystalline or polycrystalline thin film semiconductor-on-glass formation using rare-earth based material as impurity barrier layer(s) is disclosed. In particular, thin film silicon-on-glass substrate is disclosed as the alternate embodiment, with impurity barrier designed to inhibit transport of deleterious alkali species from the glass into the semiconductor thin film.Type: GrantFiled: May 12, 2008Date of Patent: December 6, 2011Assignee: Translucent Inc.Inventor: Petar Atanackovic
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Publication number: 20100068858Abstract: A method of fabricating a double gate FET on a silicon substrate includes the steps of sequentially epitaxially growing a lower gate layer of crystalline rare earth silicide material on the substrate, a lower gate insulating layer of crystalline rare earth insulating material, an active layer of crystalline semiconductor material, an upper gate insulating layer of crystalline rare earth insulating material, and an upper gate layer of crystalline rare earth conductive material. The upper gate layer and the upper gate electrically insulating layer are etched and a contact is deposited on the upper gate layer to define an upper gate structure. An impurity is implanted into the lower gate layer to define a lower gate area aligned with the upper gate structure. A source and drain are formed in the active layer and contacts are deposited on the source and drain, respectively.Type: ApplicationFiled: November 25, 2009Publication date: March 18, 2010Applicant: TRANSLUCENT INC.Inventor: Petar B. Atanakovic
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Publication number: 20090085115Abstract: A method of fabricating semiconductor components in-situ and in a continuous integrated sequence includes the steps of providing a single crystal semiconductor substrate, epitaxially growing a first layer of rare earth insulator material on the semiconductor substrate, epitaxially growing a first layer of semiconductor material on the first layer of rare earth insulator material, epitaxially growing a second layer of rare earth insulator material on the first layer of semiconductor material, and epitaxially growing a second layer of semiconductor material on the second layer of rare earth insulator material. The first layer of rare earth insulator material, the first layer of semiconductor material, the second layer of rare earth insulator material, and the second layer of semiconductor material form an in-situ grown structure of overlying layers. The in-situ grown structure is etched to define a semiconductor component and electrical contacts are deposited on the semiconductor component.Type: ApplicationFiled: December 9, 2008Publication date: April 2, 2009Applicant: TRANSLUCENT INC.Inventor: Petar B. Atanackovic
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Patent number: 7416959Abstract: A method of fabricating a semiconductor-on-insulator semiconductor substrate is disclosed that includes providing first and second semiconductor substrates. Either oxygen or nitrogen is introduced into a region adjacent the surface of the first semiconductor substrate and a rare earth and hydrogen are implanted at different energy levels into the second semiconductor substrate to produce a rare earth rich region adjacent the surface and a hydrogen layer spaced from the surface. The surface of the first semiconductor substrate is bonded to the surface of the second semiconductor substrate in a process that includes annealing to react either the oxygen or the nitrogen with the rare earth to form an interfacial insulating layer of either rare earth oxide or rare earth nitride. During the anneal the hydrogen layer is blistered and a portion of the second semiconductor substrate is removed and the surface polished to form a thin crystalline active layer on the interfacial insulating layer.Type: GrantFiled: July 25, 2007Date of Patent: August 26, 2008Assignee: Translucent Inc.Inventor: Petar B. Atanakovic
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Publication number: 20080150031Abstract: A method of fabricating a double gate FET on a silicon substrate includes the steps of sequentially epitaxially growing a lower gate layer of crystalline rare earth silicide material on the substrate, a lower gate insulating layer of crystalline rare earth insulating material, an active layer of crystalline semiconductor material, an upper gate insulating layer of crystalline rare earth insulating material, and an upper gate layer of crystalline rare earth conductive material. The upper gate layer and the upper gate electrically insulating layer are etched and a contact is deposited on the upper gate layer to define an upper gate structure. An impurity is implanted into the lower gate layer to define a lower gate area aligned with the upper gate structure. A source and drain are formed in the active layer and contacts are deposited on the source and drain, respectively.Type: ApplicationFiled: March 11, 2008Publication date: June 26, 2008Applicant: TRANSLUCENT INC.Inventor: Petar B. Atanackovic
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Patent number: 7364974Abstract: A method of fabricating a double gate FET on a silicon substrate includes the steps of sequentially epitaxially growing a lower gate layer of crystalline rare earth silicide material on the substrate, a lower gate insulating layer of crystalline rare earth insulating material, an active layer of crystalline semiconductor material, an upper gate insulating layer of crystalline rare earth insulating material, and an upper gate layer of crystalline rare earth conductive material. The upper gate layer and the upper gate electrically insulating layer are etched and a contact is deposited on the upper gate layer to define an upper gate structure. An impurity is implanted into the lower gate layer to define a lower gate area aligned with the upper gate structure. A source and drain are formed in the active layer and contacts are deposited on the source and drain, respectively.Type: GrantFiled: March 18, 2005Date of Patent: April 29, 2008Assignee: Translucent Inc.Inventor: Petar B. Atanackovic
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Patent number: 7365357Abstract: A strained transistor includes a silicon transistor, an encapsulating layer of silicon insulating material with an outer surface, and a stress inducing multilayer cap deposited on the outer surface of the encapsulating layer with at least two layers including a layer of rare earth oxide and a layer including silicon. The stress inducing cap can be designed to provide either compressive strain or tensile strain and virtually any desired amount of strain without producing dislocations, defects, and fractures in the structure.Type: GrantFiled: July 22, 2005Date of Patent: April 29, 2008Assignee: Translucent Inc.Inventors: Petar B. Atanackovic, Michael Lebby
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Publication number: 20080093670Abstract: The present invention describes a method including the steps of providing a single crystal semiconductor substrate, forming a layer of rare earth silicide on a surface of the semiconductor substrate, forming a first layer of insulating material on the layer of rare earth silicide, forming a layer of electrically conductive material on the first layer of insulating material, and forming a second layer of insulating material on the layer of electrically conductive material. In one embodiment the step of forming the layer of rare earth silicide includes depositing a layer of rare earth metal on a surface of the semiconductor substrate depositing a layer of insulating material on the layer of rare earth metal, and annealing the structure to form a layer of rare earth silicide in conjunction with the surface of the semiconductor substrate and a rare earth doped insulating layer in conjunction with the layer of insulating material.Type: ApplicationFiled: December 20, 2007Publication date: April 24, 2008Applicant: TRANSLUCENT INC.Inventors: Petar Atanakovic, MICHAEL LEBBY
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Patent number: 7323396Abstract: The present invention describes a method including the steps of providing a single crystal semiconductor substrate, forming a layer of rare earth silicide on a surface of the semiconductor substrate, forming a first layer of insulating material on the layer of rare earth silicide, forming a layer of electrically conductive material on the first layer of insulating material, and forming a second layer of insulating material on the layer of electrically conductive material. In one embodiment the step of forming the layer of rare earth silicide includes depositing a layer of rare earth metal on a surface of the semiconductor substrate depositing a layer of insulating material on the layer of rare earth metal, and annealing the structure to form a layer of rare earth silicide in conjunction with the surface of the semiconductor substrate and a rare earth doped insulating layer in conjunction with the layer of insulating material.Type: GrantFiled: April 29, 2005Date of Patent: January 29, 2008Assignee: Translucent Inc.Inventors: Petar B. Atanackovic, Michael Lebby
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Publication number: 20080020545Abstract: A method of fabricating a semiconductor-on-insulator semiconductor substrate is disclosed that includes providing first and second semiconductor substrates. Either oxygen or nitrogen is introduced into a region adjacent the surface of the first semiconductor substrate and a rare earth and hydrogen are implanted at different energy levels into the second semiconductor substrate to produce a rare earth rich region adjacent the surface and a hydrogen layer spaced from the surface. The surface of the first semiconductor substrate is bonded to the surface of the second semiconductor substrate in a process that includes annealing to react either the oxygen or the nitrogen with the rare earth to form an interfacial insulating layer of either rare earth oxide or rare earth nitride. During the anneal the hydrogen layer is blistered and a portion of the second semiconductor substrate is removed and the surface polished to form a thin crystalline active layer on the interfacial insulating layer.Type: ApplicationFiled: July 25, 2007Publication date: January 24, 2008Applicant: TRANSLUCENT INC.Inventor: Petar Atanackovic
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Patent number: 7253080Abstract: A method of fabricating a semiconductor-on-insulator semiconductor substrate is disclosed that includes providing first and second semiconductor substrates. Either oxygen or nitrogen is introduced into a region adjacent the surface of the first semiconductor substrate and a rare earth and hydrogen are implanted at different energy levels into the second semiconductor substrate to produce a rare earth rich region adjacent the surface and a hydrogen layer spaced from the surface. The surface of the first semiconductor substrate is bonded to the surface of the second semiconductor substrate in a process that includes annealing to react either the oxygen or the nitrogen with the rare earth to form an interfacial insulating layer of either rare earth oxide or rare earth nitride. During the anneal the hydrogen layer is blistered and a portion of the second semiconductor substrate is removed and the surface polished to form a thin crystalline active layer on the interfacial insulating layer.Type: GrantFiled: February 9, 2005Date of Patent: August 7, 2007Assignee: Translucent Inc.Inventor: Petar B. Atanackovic
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Patent number: 7217636Abstract: A method of fabricating a semiconductor-on-insulator semiconductor wafer is described that includes providing first and second semiconductor substrates. A first insulating layer is formed on the first substrate with a first predetermined stress and a second insulating layer is formed on the second substrate with a second predetermined stress different than the first predetermined stress. The first insulating layer is bonded to the second insulating layer to form a composite insulating layer bonding the first substrate to the second substrate and a portion of the one substrate is removed to form a thin crystalline active layer on the composite insulating layer. The first and second insulating layers are formed with different stresses to provide a desired composite stress, which can be any stress from compressive to unstressed to tensile, depending upon the desired application.Type: GrantFiled: February 9, 2005Date of Patent: May 15, 2007Assignee: Translucent Inc.Inventor: Petar B. Atanackovic
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Patent number: 7037806Abstract: A method of fabricating a semiconductor-on-insulator semiconductor substrate is disclosed that includes providing first and second semiconductor substrates. Either oxygen or nitrogen is introduced into a region adjacent the surface of the first semiconductor substrate and a rare earth is introduced into a region adjacent the surface of the second semiconductor substrate. The surface of the first semiconductor substrate is bonded to the surface of the second semiconductor substrate in a process that includes annealing to react either the oxygen or the nitrogen with the rare earth to form an interfacial insulating layer of either rare earth oxide or rare earth nitride. A portion of either the first semiconductor substrate or the second semiconductor substrate is removed and the surface polished to form a thin crystalline active layer on the insulating layer.Type: GrantFiled: February 9, 2005Date of Patent: May 2, 2006Assignee: Translucent Inc.Inventor: Petar B. Atanackovic
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Patent number: 7018484Abstract: A method of fabricating a semiconductor-on-insulator semiconductor wafer is described that includes providing first and second silicon substrates. A first thin layer of silicon dioxide is formed on one substrate and a second thicker layer of silicon dioxide is formed on the other substrate. A layer of rare earth is deposited, generally by evaporation, on the thicker layer of silicon dioxide. The rare earth layer is placed on the thin silicon dioxide layer and the structure is bonded by annealing to form a layer of rare earth silicon dioxide. A portion of the one substrate is removed to form a thin crystalline active layer on preferably the rare earth silicon dioxide layer, but potentially on the thicker silicon dioxide layer.Type: GrantFiled: February 9, 2005Date of Patent: March 28, 2006Assignee: Translucent Inc.Inventor: Peter B. Atanackovic