Patents Assigned to Transphorm Japan, Inc.
  • Patent number: 9818840
    Abstract: A semiconductor device includes a first semiconductor layer formed on a substrate; a second semiconductor layer and a third semiconductor layer formed on the first semiconductor layer; a fourth semiconductor layer formed on the third semiconductor layer; a gate electrode formed on the fourth semiconductor layer; and a source electrode and a drain electrode formed in contact with the second semiconductor layer. The third semiconductor layer and the fourth semiconductor layer are formed in an area immediately below the gate electrode, the fourth semiconductor layer is formed with a p-type semiconductor material, and the second semiconductor layer and the third semiconductor layer are formed with AlGaN, and the third semiconductor layer has a lower composition ratio of Al than that of the second semiconductor layer.
    Type: Grant
    Filed: March 30, 2017
    Date of Patent: November 14, 2017
    Assignee: Transphorm Japan, Inc.
    Inventor: Toshihide Kikkawa
  • Patent number: 9685338
    Abstract: A compound semiconductor device includes: a compound semiconductor layered structure; a gate electrode formed above the compound semiconductor layered structure; a first protective insulating film that covers a surface of the compound semiconductor layered structure and is made of silicon nitride as a material; a second protective insulating film that covers the gate electrode on the first protective insulating film and is made of silicon oxide as a material; and a third protective insulating film that contains silicon oxynitride and is formed between the first protective insulating film and the second protective insulating film.
    Type: Grant
    Filed: August 19, 2016
    Date of Patent: June 20, 2017
    Assignee: Transphorm Japan, Inc.
    Inventors: Yuichi Minoura, Yoshitaka Watanabe
  • Patent number: 9640648
    Abstract: A semiconductor device includes a first semiconductor layer formed on a substrate; a second semiconductor layer and a third semiconductor layer formed on the first semiconductor layer; a fourth semiconductor layer formed on the third semiconductor layer; a gate electrode formed on the fourth semiconductor layer; and a source electrode and a drain electrode formed in contact with the second semiconductor layer. The third semiconductor layer and the fourth semiconductor layer are formed in an area immediately below the gate electrode, the fourth semiconductor layer is formed with a p-type semiconductor material, and the second semiconductor layer and the third semiconductor layer are formed with AlGaN, and the third semiconductor layer has a lower composition ratio of Al than that of the second semiconductor layer.
    Type: Grant
    Filed: February 25, 2016
    Date of Patent: May 2, 2017
    Assignee: Transphorm Japan, Inc.
    Inventor: Toshihide Kikkawa
  • Patent number: 9620616
    Abstract: A method of manufacturing a semiconductor device includes laminating and forming an electron transit layer, an electron supplying layer, an etching stop layer, and a p-type film on a substrate sequentially, the p-type film being formed of a nitride semiconductor material that includes Al doped with an impurity element that attains p-type, the etching stop layer being formed of a material that includes GaN, removing the p-type film in an area except an area where a gate electrode is to be formed, by dry etching to form a p-type layer in the area where the gate electrode is to be formed, the dry etching being conducted while plasma emission in the dry etching is observed, the dry etching being stopped after the dry etching is started and plasma emission originating from Al is not observed, and forming the gate electrode on the p-type layer.
    Type: Grant
    Filed: December 24, 2014
    Date of Patent: April 11, 2017
    Assignee: Transphorm Japan, Inc.
    Inventors: Atsushi Yamada, Kenji Nukui
  • Patent number: 9425268
    Abstract: A compound semiconductor device includes: a compound semiconductor layered structure; a gate electrode formed above the compound semiconductor layered structure; a first protective insulating film that covers a surface of the compound semiconductor layered structure and is made of silicon nitride as a material; a second protective insulating film that covers the gate electrode on the first protective insulating film and is made of silicon oxide as a material; and a third protective insulating film that contains silicon oxynitride and is formed between the first protective insulating film and the second protective insulating film.
    Type: Grant
    Filed: August 27, 2013
    Date of Patent: August 23, 2016
    Assignee: Transphorm Japan, Inc.
    Inventors: Yuichi Minoura, Yoshitaka Watanabe
  • Patent number: 9349805
    Abstract: A semiconductor apparatus includes a substrate; a first semiconductor layer formed on the substrate and formed of a nitride semiconductor; a second semiconductor layer formed on the first semiconductor layer and formed of a nitride semiconductor; first and second gate electrodes, a source electrode, and a drain electrode formed on the second semiconductor layer; an interlayer insulation film formed on the second semiconductor layer; and a field plate formed on the interlayer insulation film. Further, the first gate electrode and the second gate electrode are formed between a region where the source electrode is formed and a region where the field plate is formed, an element isolation region is formed in the first and the second semiconductor layers which are between the first and the second gate electrodes, and the second gate electrode is electrically connected to the source electrode.
    Type: Grant
    Filed: January 29, 2014
    Date of Patent: May 24, 2016
    Assignee: Transphorm Japan, Inc.
    Inventors: Yuji Ito, Yuko Matsui, Yoshiyuki Kotani
  • Patent number: 9299822
    Abstract: A semiconductor device includes a first semiconductor layer formed on a substrate; a second semiconductor layer and a third semiconductor layer formed on the first semiconductor layer; a fourth semiconductor layer formed on the third semiconductor layer; a gate electrode formed on the fourth semiconductor layer; and a source electrode and a drain electrode formed in contact with the second semiconductor layer. The third semiconductor layer and the fourth semiconductor layer are formed in an area immediately below the gate electrode, the fourth semiconductor layer is formed with a p-type semiconductor material, and the second semiconductor layer and the third semiconductor layer are formed with AlGaN, and the third semiconductor layer has a lower composition ratio of Al than that of the second semiconductor layer.
    Type: Grant
    Filed: July 17, 2013
    Date of Patent: March 29, 2016
    Assignee: Transphorm Japan, Inc.
    Inventor: Toshihide Kikkawa
  • Patent number: 9231075
    Abstract: A semiconductor device includes a nitride semiconductor stacked structure including a carrier transit layer and a carrier supply layer; a p-type nitride semiconductor layer provided over the nitride semiconductor stacked structure and including an active region and an inactive region; an n-type nitride semiconductor layer provided on the inactive region in the p-type nitride semiconductor layer; and a gate electrode provided over the active region in the p-type nitride semiconductor layer.
    Type: Grant
    Filed: March 11, 2015
    Date of Patent: January 5, 2016
    Assignee: Transphorm Japan, Inc.
    Inventor: Atsushi Yamada
  • Patent number: 9224848
    Abstract: An AlGaN/GaN.HEMT includes, a compound semiconductor lamination structure; a p-type semiconductor layer formed on the compound semiconductor lamination structure; and a gate electrode formed on the p-type semiconductor layer, in which Mg being an inert element of p-GaN is introduced into both sides of the gate electrode at the p-type semiconductor layer, and introduced portions of Mg are inactivated.
    Type: Grant
    Filed: December 5, 2014
    Date of Patent: December 29, 2015
    Assignee: Transphorm Japan, Inc.
    Inventor: Toshihide Kikkawa
  • Patent number: 9142638
    Abstract: A semiconductor device includes an electron transit layer formed on a substrate; an electron supply layer formed on the electron transit layer; a doping layer formed on the electron supply layer, the doping layer being formed with a nitride semiconductor in which an impurity element to become p-type and C are doped; a p-type layer formed on the doping layer, the p-type layer being formed with a nitride semiconductor in which the impurity element to become p-type is doped; a gate electrode formed on the p-type layer; and a source electrode and a drain electrode formed on the doping layer or the electron supply layer. The p-type layer is formed in an area immediately below the gate electrode, and a density of the C doped in the doping layer is greater than or equal to 1×1017 cm?3 and less than or equal to 1×1019 cm?3.
    Type: Grant
    Filed: March 5, 2015
    Date of Patent: September 22, 2015
    Assignee: Transphorm Japan, Inc.
    Inventor: Atsushi Yamada
  • Patent number: 9142658
    Abstract: A compound semiconductor device includes: a compound semiconductor layer; and a gate electrode formed above the compound semiconductor layer; and a source electrode and a drain electrode formed on both sides of the gate electrode, on the compound semiconductor layer, wherein the source electrode has a plurality of bottom surfaces along transit electrons out of contact surfaces with the compound semiconductor layer, and the plural bottom surfaces are located at different distances from the transit electrons, with the bottom surface closer to the gate electrode being more apart from the transit electrons.
    Type: Grant
    Filed: September 20, 2013
    Date of Patent: September 22, 2015
    Assignee: Transphorm Japan, Inc.
    Inventors: Toshihide Kikkawa, Kenji Nukui
  • Patent number: 9136107
    Abstract: A method for manufacturing a semiconductor device includes forming an electron transit layer on a semiconductor substrate, forming an electron supply layer on the electron transit layer, forming a cap layer on the electron supply layer, forming a protection layer on the cap layer, the protection layer having an opening part, through which a part of the cap layer is exposed, and forming an oxidation film on an exposed surface of the cap layer by a wet process.
    Type: Grant
    Filed: December 6, 2013
    Date of Patent: September 15, 2015
    Assignee: Transphorm Japan, Inc.
    Inventors: Yoshiyuki Katani, Shinichi Akiyama
  • Patent number: 9099351
    Abstract: A compound semiconductor device includes as compound semiconductor layers: a first layer; a second layer larger in band gap than the first layer, formed above the first layer; a third layer having a p-type conductivity type, formed above the second layer; a gate electrode formed above the second layer via the third layer; a fourth layer larger in band gap than the second layer, formed to be in contact with the third layer above the second layer; and a fifth layer smaller in band gap than the fourth layer, formed to be in contact with the third layer above the fourth layer.
    Type: Grant
    Filed: July 16, 2013
    Date of Patent: August 4, 2015
    Assignee: Transphorm Japan, Inc.
    Inventors: Masato Nishimori, Tadahiro Imada, Toshihiro Ohki
  • Patent number: 9099545
    Abstract: A compound semiconductor device includes a substrate; a compound semiconductor layer formed on the substrate; a first insulating film formed on the compound semiconductor layer; a second insulating film formed on the first insulating film; and a gate electrode, a source electrode, and a drain electrode, each being formed on the compound semiconductor layer, wherein the gate electrode is formed of a first opening filled with a first conductive material via at least a gate insulator, and the first opening is formed in the first insulating film and configured to partially expose the compound semiconductor layer, and wherein the source electrode and the drain electrode are formed of a pair of second openings filled with at least a second conductive material, and the second openings are formed in at least the second insulating film and the first insulating film and configured to partially expose the compound semiconductor layer.
    Type: Grant
    Filed: September 23, 2013
    Date of Patent: August 4, 2015
    Assignee: Transphorm Japan, Inc.
    Inventors: Shinichi Akiyama, Kenji Nukui, Mutsumi Katou, Yoshitaka Watanabe, Tetsuya Itou, Yoichi Fujisawa, Toshiya Sato, Tsutomu Hosoda, Yuuichi Satou
  • Patent number: 9059136
    Abstract: An AlGaN/GaN HEMT includes: a compound semiconductor layer; a source electrode and a drain electrode formed on an upper side of the compound semiconductor layer; and an Al—Si—N layer being a high-resistance layer disposed in a lower portion of at least one of the source electrode and the drain electrode and higher in an electric resistance value than the source electrode and the drain electrode.
    Type: Grant
    Filed: August 27, 2014
    Date of Patent: June 16, 2015
    Assignee: Transphorm Japan, Inc.
    Inventors: Youichi Kamada, Kenji Kiuchi
  • Patent number: 9035356
    Abstract: A semiconductor device includes an electron transit layer formed on a substrate; an electron supply layer formed on the electron transit layer; a doping layer formed on the electron supply layer, the doping layer being formed with a nitride semiconductor in which an impurity element to become p-type and C are doped; a p-type layer formed on the doping layer, the p-type layer being formed with a nitride semiconductor in which the impurity element to become p-type is doped; a gate electrode formed on the p-type layer; and a source electrode and a drain electrode formed on the doping layer or the electron supply layer. The p-type layer is formed in an area immediately below the gate electrode, and a density of the C doped in the doping layer is greater than or equal to 1×1017 cm?3 and less than or equal to 1×1019 cm?3.
    Type: Grant
    Filed: July 16, 2013
    Date of Patent: May 19, 2015
    Assignee: Transphorm Japan, Inc.
    Inventor: Atsushi Yamada
  • Patent number: 9006787
    Abstract: A semiconductor device includes a nitride semiconductor stacked structure including a carrier transit layer and a carrier supply layer; a p-type nitride semiconductor layer provided over the nitride semiconductor stacked structure and including an active region and an inactive region; an n-type nitride semiconductor layer provided on the inactive region in the p-type nitride semiconductor layer; and a gate electrode provided over the active region in the p-type nitride semiconductor layer.
    Type: Grant
    Filed: October 30, 2013
    Date of Patent: April 14, 2015
    Assignee: Transphorm Japan, Inc.
    Inventor: Atsushi Yamada
  • Patent number: 8962409
    Abstract: A method for fabricating a semiconductor device is disclosed. The method includes sequentially forming a first semiconductor layer, a second semiconductor layer and a semiconductor cap layer containing a p-type impurity element on a substrate, forming a dielectric layer having an opening after the forming of the semiconductor cap layer, forming a third semiconductor layer containing a p-type impurity element on the semiconductor cap layer exposed from the opening of the dielectric layer, and forming a gate electrode on the third semiconductor layer.
    Type: Grant
    Filed: August 8, 2012
    Date of Patent: February 24, 2015
    Assignee: Transphorm Japan, Inc.
    Inventor: Shuichi Tomabechi
  • Patent number: 8957453
    Abstract: A method of manufacturing a semiconductor device includes laminating and forming an electron transit layer, an electron supplying layer, an etching stop layer, and a p-type film on a substrate sequentially, the p-type film being formed of a nitride semiconductor material that includes Al doped with an impurity element that attains p-type, the etching stop layer being formed of a material that includes GaN, removing the p-type film in an area except an area where a gate electrode is to be formed, by dry etching to form a p-type layer in the area where the gate electrode is to be formed, the dry etching being conducted while plasma emission in the dry etching is observed, the dry etching being stopped after the dry etching is started and plasma emission originating from Al is not observed, and forming the gate electrode on the p-type layer.
    Type: Grant
    Filed: July 30, 2013
    Date of Patent: February 17, 2015
    Assignee: Transphorm Japan, Inc.
    Inventors: Atsushi Yamada, Kenji Nukui
  • Patent number: 8933489
    Abstract: An AlGaN/GaN.HEMT includes, a compound semiconductor lamination structure; a p-type semiconductor layer formed on the compound semiconductor lamination structure; and a gate electrode formed on the p-type semiconductor layer, in which Mg being an inert element of p-GaN is introduced into both sides of the gate electrode at the p-type semiconductor layer, and introduced portions of Mg are inactivated.
    Type: Grant
    Filed: March 6, 2013
    Date of Patent: January 13, 2015
    Assignee: Transphorm Japan, Inc.
    Inventor: Toshihide Kikkawa