Patents Assigned to Triad Semiconductor, Inc.
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Patent number: 11545995Abstract: Disclosed herein are devices, systems, and methods for improved demodulation. In one embodiment, a demodulator includes an input port configured to receive an analog input signal having a first frequency spectrum, a delta-sigma modulator electrically coupled with the input port, a digital downconverter electrically coupled with the delta-sigma modulator, and a filter electrically coupled with the digital downconverter. The filter is configured for a passband having a second frequency spectrum. The demodulator also includes an output port electrically coupled with the filter. The output port is configured to provide an output signal having the second frequency spectrum.Type: GrantFiled: April 7, 2021Date of Patent: January 3, 2023Assignee: TRIAD SEMICONDUCTOR, INC.Inventors: Stephen T. Janesch, William Farlow
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Patent number: 7972907Abstract: A semiconductor device having a plurality of layers and a plurality of circuit elements arranged in tiles. At least one of the plurality of layers in the semiconductor device may be a via layer configured to determine the connections of the plurality of circuit elements. The semiconductor device may include an interconnection quilt having a plurality of metal layers disposed to interconnect the plurality of circuit elements. The plurality of circuit elements may be analog circuit element and/or digital circuit elements. The tiles may be analog tiles and digital tiles that form a mixed signal structured array.Type: GrantFiled: November 11, 2008Date of Patent: July 5, 2011Assignees: Triad Semiconductor, Inc., ViAsic, Inc.Inventors: James C. Kemerling, David Ihme, William D. Cox
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Patent number: 7626272Abstract: A semiconductor device having a plurality of layers and a plurality of circuit elements arranged in tiles. At least one of the plurality of layers in the semiconductor device may be a via layer configured to determine the connections of the plurality of circuit elements. The semiconductor device may include an interconnection quilt having a plurality of metal layers disposed to interconnect the plurality of circuit elements. The plurality of circuit elements may be analog circuit element and/or digital circuit elements. The tiles may be analog tiles and digital tiles that form a mixed signal structured array.Type: GrantFiled: October 7, 2008Date of Patent: December 1, 2009Assignees: Triad Semiconductor, Inc., ViAsic, Inc.Inventors: James C. Kemerling, David Ihme, William D. Cox
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Patent number: 7595229Abstract: A semiconductor device having a plurality of layers and a capacitor array that includes a plurality of individual capacitors. At least one of the plurality of layers in the semiconductor device may be a via layer configured to determine the connections and capacitances of the plurality of individual capacitors in the capacitor array. The semiconductor device may include a metal structure disposed within the device to provide an electromagnetic shield for at least one of the plurality of individual capacitors in the capacitor array.Type: GrantFiled: December 27, 2007Date of Patent: September 29, 2009Assignees: Triad Semiconductor, Inc., Viasic, Inc.Inventors: David Ihme, James C. Kemerling, William D. Cox
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Publication number: 20090061567Abstract: A semiconductor device having a plurality of layers and a plurality of circuit elements arranged in tiles. At least one of the plurality of layers in the semiconductor device may be a via layer configured to determine the connections of the plurality of circuit elements. The semiconductor device may include an interconnection quilt having a plurality of metal layers disposed to interconnect the plurality of circuit elements. The plurality of circuit elements may be analog circuit element and/or digital circuit elements. The tiles may be analog tiles and digital tiles that form a mixed signal structured array.Type: ApplicationFiled: November 11, 2008Publication date: March 5, 2009Applicants: Triad Semiconductor, Inc., ViAsic, Inc.Inventors: James C. Kemerling, David Ihme, William D. Cox
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Publication number: 20090032968Abstract: A semiconductor device having a plurality of layers and a plurality of circuit elements arranged in tiles. At least one of the plurality of layers in the semiconductor device may be a via layer configured to determine the connections of the plurality of circuit elements. The semiconductor device may include an interconnection quilt having a plurality of metal layers disposed to interconnect the plurality of circuit elements. The plurality of circuit elements may be analog circuit element and/or digital circuit elements. The tiles may be analog tiles and digital tiles that form a mixed signal structured array.Type: ApplicationFiled: October 7, 2008Publication date: February 5, 2009Applicants: Triad Semiconductor, Inc., ViAsic, Inc.Inventors: James C. Kemerling, David Ihme, William D. Cox
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Publication number: 20080108201Abstract: A semiconductor device having a plurality of layers and a capacitor array that includes a plurality of individual capacitors. At least one of the plurality of layers in the semiconductor device may be a via layer configured to determine the connections and capacitances of the plurality of individual capacitors in the capacitor array. The semiconductor device may include a metal structure disposed within the device to provide an electromagnetic shield for at least one of the plurality of individual capacitors in the capacitor array.Type: ApplicationFiled: December 27, 2007Publication date: May 8, 2008Applicants: Triad Semiconductor, Inc., Viasic, Inc.Inventors: David Ihme, James Kemerling, William Cox
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Patent number: 7335966Abstract: A semiconductor device having a plurality of layers and a capacitor array that includes a plurality of individual capacitors. At least one of the plurality of layers in the semiconductor device may be a via layer configured to determine the connections and capacitances of the plurality of individual capacitors in the capacitor array. The semiconductor device may include a metal structure disposed within the device to provide an electromagnetic shield for at least one of the plurality of individual capacitors in the capacitor array.Type: GrantFiled: February 23, 2005Date of Patent: February 26, 2008Assignees: Triad Semiconductor, Inc., ViASIC, Inc.Inventors: David Ihme, James C. Kemerling, William D. Cox