Abstract: A moving coil linear motor having a central row of alternating, permanent magnets, with multi-phase, multi-pole coil assemblies located on both sides of the magnet row. Magnetic circuit completion material is located approximately the same height as the magnets and outside the coil assemblies. The coil assemblies are formed of a series of individual coils connected in a multi-phase, multi-pole relationship. At locations other than the coil assembly ends, the individual coils of a phase are adjacent and connected so that a current passes through them in a uniform direction. The individual coil total width is equal to the distance from a point on a magnet to the same point on the adjacent magnet, with the individual coil thickness being the total width divided by twice the number of phases. The coil assembly is coated with an epoxy to improve thermal mass and thermal conductivity and a phenolic to resist abrasion and the environment.

Abstract: An integrated circuit memory system having an array of ECL memory cells, an address circuit, a READ/WRITE circuit and a coupling circuit which increases the operating current of an addressed memory cell during a READ/WRITE operation. The increased operating current is short enough to prevent an excessive saturation of the memory cell transistors. The addressed memory cells remain in a low operating current sufficient to maintain the memory cells in their particular states. Since timing is critical, timing circuits for a system clock are also part of the memory system.

Abstract: A circuit structure, and method for forming the structure, permits wafer scale integration by fabricating plural copies of the circuit in integrated circuit form, and interconnecting predetermined circuit element groups of the copies in a manner that permits a majority voting operation to take place. In this manner, defective circuit elements are masked by being out-voted by corresponding non-defective circuit elements that participate in the voting process. Alternate embodiments of a voter unit, used to implement the voting operation, includes a preferred embodiment that takes advantage of emitter-coupled-logic structure to provide a multiplex, voter, latch combination capable of selectively implementing normal and diagnostic operation. Included in the preferred embodiment of the voter unit is a fused link that implements a repair operation in the event there exists more defective circuit element groups than non-defective circuit element groups participating in the voting process.