Abstract: An interpolated lookup table circuit includes an input port for receiving an input signal having a first plurality of bits (N bits) including a first portion (Q bits) and a second portion (N-Q bits), a lookup table (LUT) having a plurality of entries wherein each of the plurality of entries has a second plurality of bits including a third portion (V bits) and a fourth portion (D bits), selection means operatively coupled to the input port and responsive to at least the first portion of the input signal which selects one of the plurality of LUT entries based on the first portion of the lookup table input signal.