Patents Assigned to TSMC-ACER Semiconductor Manufacturing Corporation
  • Patent number: 6365504
    Abstract: A method for fabricating an interconnection between a conductive line and a via plug on an insulating layer, comprises the steps of: forming a conductive line pattern on the insulating layer; etching the upper part of the insulating layer and forming a conductive line opening; forming conductive line spacers to provide better alignment between the conductive line and the via, to provide better control of a small via, and to help the metal to have better coverage effects in filling in the conductive line opening and the via; producing a via pattern on the insulating layer and the via pattern opening being substantially larger than the conductive line opening; etching the exposed lower part of the insulating layer by utilizing the conductive line spacers as an etching mask and forming a via hole; and filling the conductive line opening and the via hole with a conductive material and forming an interconnection of the conductive line and a via plug.
    Type: Grant
    Filed: October 15, 1999
    Date of Patent: April 2, 2002
    Assignee: TSMC-ACER Semiconductor Manufacturing Corporation
    Inventors: Wu Kuo Chien, Chen Hsi Chieh, Chen Han Ping