Patents Assigned to Tundra Semiconductor Corp.
  • Physical layers
    Patent number: 7112990
    Abstract: Improvements to the physical layer are provided, for example a test circuit that does not introduce further skew into critical clock signals. A boundary scan test circuit is also provided used to isolate an integrated circuit for applying test vectors or circuit brand connections to test the integrity thereof. A bias voltage generator for a voltage controlled delay line (VCDL) is also provided.
    Type: Grant
    Filed: January 16, 2004
    Date of Patent: September 26, 2006
    Assignee: Tundra Semiconductor Corp.
    Inventors: Steven M. Waldstein, Maurice Richard, Alexander Alexeyev, David Reynolds