Patents Assigned to Twisden Ltd.
  • Patent number: 10424492
    Abstract: The present invention relates to an integrated circuit packaging, comprising: a plurality of electrical circuits using a first patterned conductive layer (103) formed by using a masking material (102); a second patterned conductive layer (105) having disposed on at least one side of the first patterned conductive layer (103); and a first dielectric layer (106) made from a laminating means, wherein the first patterned conductive layer (103) and the second patterned conductive layer (105) are disposed within the first dielectric layer (106), such that at least one side of the first dielectric layer (106) are located at the same plane with the first patterned conductive layer (103).
    Type: Grant
    Filed: September 2, 2015
    Date of Patent: September 24, 2019
    Assignee: Twisden Ltd.
    Inventors: Loke Chew Low, Poh Cheng Ang, Linhui Yuan
  • Patent number: 10190218
    Abstract: An integrated circuit substrate, and method of production, includes an internal patterned mask layer defined by multiple mask units that are spaced apart by gaps on a partially or completely removable carrier, and an internal conductive trace layer formed by one or more internal conductive traces that are deposited into the gaps of each internal patterned mask layer such that each gap is occupied with an internal conductive trace. The internal patterned mask layer is made of a photoimageable dielectric material that is retained in the integrated circuit substrate. Other embodiments include the formation of permanent or removable external patterned mask layer and external conductive trace layer on the topmost and optionally the bottommost internal patterned mask layer and internal conductive trace layer. The substrate can also include an insulating layer to partially or completely encapsulate the external conductive trace layer upon removal of the external patterned mask layer.
    Type: Grant
    Filed: January 24, 2018
    Date of Patent: January 29, 2019
    Assignee: TWISDEN LTD.
    Inventors: Loke Chew Low, Linhui Yuan, Poh Cheng Ang
  • Publication number: 20180209046
    Abstract: An integrated circuit substrate, and method of production, includes an internal patterned mask layer defined by multiple mask units that are spaced apart by gaps on a partially or completely removable carrier, and an internal conductive trace layer formed by one or more internal conductive traces that are deposited into the gaps of each internal patterned mask layer such that each gap is occupied with an internal conductive trace. The internal patterned mask layer is made of a photoimageable dielectric material that is retained in the integrated circuit substrate. Other embodiments include the formation of permanent or removable external patterned mask layer and external conductive trace layer on the topmost and optionally the bottommost internal patterned mask layer and internal conductive trace layer. The substrate can also include an insulating layer to partially or completely encapsulate the external conductive trace layer upon removal of the external patterned mask layer.
    Type: Application
    Filed: January 24, 2018
    Publication date: July 26, 2018
    Applicant: Twisden Ltd.
    Inventors: Loke Chew Low, Linhui Yuan, Poh Cheng Ang