Abstract: A universal driving apparatus of a computer system inputs two control signals of two different duty cycles through a speed control pin of a receptacle for connecting fans with the electricity supplied continuously. The differentiation percentage of the two speeds is compared with a threshold to identify the fan types. Therefore the computer system is capable of driving the identified fan correctly according to the result of the fan-type identification.

Abstract: A system is provided to assign IP (Internet Protocol) addresses to plural management modules under different IP modes. The system management modules are configured in a computing system that is integrated in a single chassis. All the system management modules are connected through a first management network to be assigned with a static IP address or a DHCP. Besides, a secondary system management network is used for each of the management modules to facilitate the assignment of pre-assigned private IP addresses based on the board IDs of the management modules. When DHCP mode is selected, IP configuration will be performed automatically. Namely in DHCP mode, even if the system is disconnected from the external network, the system management can be done through the system management network with the pre-assigned private IP address.

Abstract: An advanced programmable interrupt controller (APIC) identification (ID) configuration method is applied to a multiprocessor computer system. The method assigns a postponed ID to each CPU's APIC IDs respectively during the initialization. Plural reserved IDs are assigned to the I/O APICs. A multiprocessor configuration table in a basic input output system (BIOS) will be updated with renewed ID configuration, to avoid an ID conflict when processing the interrupt request from the peripheral devices and raise the stability of the multiprocessor computer system.

Abstract: A universal driving apparatus of a computer system, including a receptacle, a power switch, an integrator and a comparator, is provided to identify and drive a first fan and a second fan. The receptacle connects to the first fan or the second fan for electricity supply and system control. The integrator integrates speed signals of the first fan and the second fan to output an integrated-speed voltage. The comparator compares the integrated-speed voltage and a comparative voltage to output a comparative signal. Accordingly, the computer system uses the comparative signal to identify the fan type and actuate the first fan or the second fan correctly.

Abstract: A multi-processor system has a tubelike computer module including plural mother boards configured onto plural side walls of a rack body to form a unitary, continuous and non-segment airflow channel. The airflow channel of the tubelike computer module has larger space and fewer barriers to allow the airflow passing through smoothly, and to reduce wind noises or turbulences. Therefore, the system achieves optimum heat-dissipation efficiency and noise reduction by means of specific space arrangement and less cooling system requirement.

Abstract: A redundant clock distribution architecture is provided for a blade clustering system to achieve SMP (symmetric multi-processor) capability and flexible system configuration. The architecture mainly provides a central clock signal from a central clock and a local clock signal from an operative local clock configured on each blade module of the system. A clock multiplexer selects the central clock signal and sends to plural local clock consumers on each blade module. The clock multiplexer switches to send the local clock signal if the central clock fails.

Abstract: A computer system with a fixing module for riser card thereof is provided. By allowing the bottom side of the supporting pillar and the bottom parts of the two opposite sides of the supporting pillar engaging with each other, the riser card is supported by stress from all directions around it. Therefore, enough supporting strength is efficiently provided within a limited space and the riser card is prevented from being bended and having deformation because of the heavy weight.

Abstract: A power switch device and method for a cluster computer is described. A power input circuit receives plural input powers and plural state signals corresponding to the input powers. A first output circuit supplies the input powers to a head node and at least one compute node. A second output circuit supplies the input powers to the head node. A gate produces a switch signal according to the state signals. According to the switch signal, a switch module connects the power input circuit to the first output circuit or the second output circuit. And a spare power module, connected to the first and second output circuits, stores a spare power charged from the first output circuit and supplies the spare power to the second output circuit during a switch period.

Abstract: An apparatus to process signals within a computer that has a primary bus including a primary bus interconnection slot and a secondary bus including a secondary bus interconnection slot is described. The apparatus includes a primary bus card with a primary bus connector region for connection with the primary bus interconnection slot. The primary bus card includes a processing circuit electrically connected to the primary bus connector region to process primary bus signals from the primary bus. In addition, the primary bus card has a bridge cable connector electrically connected to the processing circuit. The invention also uses a secondary bus connector that is positionable within the secondary bus interconnection slot. The secondary bus connector has a vertical height substantially equivalent to the vertical height of the secondary bus interconnection slot.