Patents Assigned to U.S. ETHERNET INNOVATIONS
  • Programmed I/O ethernet adapter with early interrupts for accelerating data transfer
    Patent number: 8239580
    Abstract: In a Local Area Network (LAN) system, an Ethernet adapter exchanges data with a host through programmed I/O (PIO) and FIFO buffers. The receive PIO employs a DMA ring buffer backup so incoming packets can be copied directly into host memory when the PIO FIFO buffer is full. The adapter may be programmed to generate early receive interrupts when only a portion of a packet has been received from the network, so as to decrease latency. The adapter may also be programmed to generate a second early interrupt so that the copying of a large packet to the host may overlap reception of the packet end. The adapter to begin packet transmission before the packet is completely transferred from the host to the adapter, which further reduces latency.
    Type: Grant
    Filed: November 4, 2010
    Date of Patent: August 7, 2012
    Assignee: U.S. Ethernet Innovations, LLC
    Inventors: Richard Hausman, Paul William Sherer, James P. Rivers, Cynthia Zikmund, Glenn W. Connery, Niles E. Strohl, Richard S. Reid
  • Programmed I/O ethernet adapter with early interrupts for accelerating data transfer
    Patent number: 7899937
    Abstract: In a Local Area Network (LAN) system, an ethernet adapter exchanges data with a host through programmed I/O (PIO) and FIFO buffers. The receive PIO employs a DMA ring buffer backup so incoming packets can be copied directly into host memory when the PIO FIFO buffer is full. The adapter may be programmed to generate early receive interrupts when only a portion of a packet has been received from the network, so as to decrease latency. The adapter may also be programmed to generate a second early interrupt so that the copying of a large packet to the host may overlap reception of the packet end. The adapter to begin packet transmission before the packet is completely transferred from the host to the adapter, which further reduces latency.
    Type: Grant
    Filed: January 21, 2000
    Date of Patent: March 1, 2011
    Assignee: U.S. Ethernet Innovations, LLC
    Inventors: Richard Hausman, Paul William Sherer, James P. Rivers, Cynthia Zikmund, Glenn W. Connery, Niles E. Strohl, Richard S. Reid
  • PROGRAMMED I/O ETHERNET ADAPTER WITH EARLY INTERRUPTS FOR ACCELERATING DATA TRANSFER
    Publication number: 20110047302
    Abstract: In a Local Area Network (LAN) system, an Ethernet adapter exchanges data with a host through programmed I/O (PIO) and FIFO buffers. The receive PIO employs a DMA ring buffer backup so incoming packets can be copied directly into host memory when the PIO FIFO buffer is full. The adapter may be programmed to generate early receive interrupts when only a portion of a packet has been received from the network, so as to decrease latency. The adapter may also be programmed to generate a second early interrupt so that the copying of a large packet to the host may overlap reception of the packet end. The adapter to begin packet transmission before the packet is completely transferred from the host to the adapter, which further reduces latency.
    Type: Application
    Filed: November 4, 2010
    Publication date: February 24, 2011
    Applicant: U.S. ETHERNET INNOVATIONS
    Inventors: Richard Hausman, Paul William Sherer, James P. Rivers, Cynthia Zikmund, Glenn W. Connery, Niles E. Strohl, Richard S. Reid